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J. R. Hauser - IEEE Xplore Author Profile
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J. R. Hauser

Also published under: John R. Hauser, J. Hauser

Publications
61
Citations
2,884
Publications by Year
19682005
Co-Authors:
Show All Co-Authors (108)
Image of author J. R. Hauser

J. R. Hauser

Also published under: John R. Hauser, J. Hauser

Affiliation

North Carolina State University
Raleigh
NC, USA

Publication Topics

Biography

John R. Hauser (LF'00) received the B.S. degree in electrical engineering from North Carolina State University, Raleigh, in 1960, and the M.S. and Ph.D. degrees from Duke University, Durham, NC, in 1962 and 1964, respectively.,He is a Faculty Member, Electrical and Computer Engineering Department, North Carolina State University. In 1960 and 1961, he was employed by Bell Laboratories, Winston-Salem, NC. He joined the Research Triangle Institute in 1962, where he did research work on semiconductor and microelectronics devices. In 1966 he joined the faculty at North Carolina State University. He has published over 150 technical papers in the area of microelectronic materials and devices. He has served as Director of the National Science Found...
Publications
61
Citations
2,884
Publications by Year
19682005
Co-Authors:
Show All Co-Authors (108)
Author's Published Works

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A new and improved physics-based model for MOS transistors

J.R. Hauser

IEEE Transactions on Electron Devices
Year: 2005 | Volume: 52, Issue: 12 | Journal Article |
Cited by: Papers (17)
An improved MOS device model is derived based upon a first-order model for the dependency of MOS surface mobility on surface field and lateral drain field. A comparison with experimental data shows that a consistent set of physical parameters can be used to describe both long-channel nMOS devices and short-channel devices. The model can form the basis for improved compact MOS models for circuit an...Show More

A new and improved physics-based model for MOS transistors

J.R. Hauser

Year: 2005 | Volume: 52, Issue: 12 | Journal Article |

Intrinsic mobility evaluation of high-/spl kappa/ gate dielectric transistors using pulsed I/sub d/-V/sub g/

C.D. Young;P. Zeitzoff;G.A. Brown;G. Bersuker;Byoung Hun Lee;J.R. Hauser

IEEE Electron Device Letters
Year: 2005 | Volume: 26, Issue: 8 | Journal Article |
Cited by: Papers (34)
A novel intrinsic mobility extraction methodology for high-/spl kappa/ gate stacks that only requires a capacitance-voltage and pulsed I/sub d/-V/sub g/ measurement is demonstrated on SiO/sub 2/ and high-/spl kappa/ gate dielectric transistors and is benchmarked to other reported mobility extraction techniques. Fast transient charging effects in high-/spl kappa/ gate stacks are shown to cause the ...Show More

Intrinsic mobility evaluation of high-/spl kappa/ gate dielectric transistors using pulsed I/sub d/-V/sub g/

C.D. Young;P. Zeitzoff;G.A. Brown;G. Bersuker;Byoung Hun Lee;J.R. Hauser

Year: 2005 | Volume: 26, Issue: 8 | Journal Article |

Substrate voltage and accumulation-mode MOS varactor capacitance

S.A. Wartenberg;J.R. Hauser

IEEE Transactions on Electron Devices
Year: 2005 | Volume: 52, Issue: 7 | Journal Article |
To adjust the capacitance of an accumulation-mode MOS varactor, a voltage is applied to the drain/source with the gate grounded. In this novel arrangement, a voltage is applied to the gate V/sub gate/ and another to the substrate V/sub sub/ with the drain/source grounded. Applying V/sub sub/ between the p/sup +/-type substrate and the varactor's n-well adjusts the minimum capacitance C/sub min/ an...Show More

Substrate voltage and accumulation-mode MOS varactor capacitance

S.A. Wartenberg;J.R. Hauser

Year: 2005 | Volume: 52, Issue: 7 | Journal Article |

The epHEMT gate at microwave frequencies

S.A. Wartenberg;J.R. Hauser

IEEE Transactions on Microwave Theory and Techniques
Year: 2003 | Volume: 51, Issue: 6 | Journal Article |
This paper examines the high-frequency behavior of the enhancement-mode pseudomorphic high electron-mobility transistor (epHEMT) gate. During this study, no bias was applied between the drain and source. Rather, the gate was forward biased with either the drain, source, or channel (drain and source connected together) grounded. While applying positive voltage V/sub g/ to the gate, one-port S-param...Show More

The epHEMT gate at microwave frequencies

S.A. Wartenberg;J.R. Hauser

Year: 2003 | Volume: 51, Issue: 6 | Journal Article |

Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go?

C. M. Osburn;I. Kim;S. K. Han;I. De;K. F. Yee;S. Gannavaram;S. J. Lee;C.-H. Lee;Z. J. Luo;W. Zhu;J. R. Hauser;D.-L. Kwong;G. Lucovsky;T. P. Ma;M. C. Ozturk

IBM Journal of Research and Development
Year: 2002 | Volume: 46, Issue: 2.3 | Journal Article |
Cited by: Papers (27)
The vertical scaling requirements for gate stacks and for shallow extension junctions are reviewed. For gate stacks, considerable progress has been made in optimizing oxide/nitride and oxynitride dielectrics to reduce boron penetration and dielectric leakage compared to pure SiO2 in order to allow sub-2-nm dielectrics. Several promising alternative material candidates exist for 1-nm equivalent oxi...Show More

Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go?

C. M. Osburn;I. Kim;S. K. Han;I. De;K. F. Yee;S. Gannavaram;S. J. Lee;C.-H. Lee;Z. J. Luo;W. Zhu;J. R. Hauser;D.-L. Kwong;G. Lucovsky;T. P. Ma;M. C. Ozturk

Year: 2002 | Volume: 46, Issue: 2.3 | Journal Article |

Overview of high K gate dielectric research

J.R. Hauser

2001 International Semiconductor Device Research Symposium. Symposium Proceedings (Cat. No.01EX497)
Year: 2001 | Conference Paper |
The replacement of SiO/sub 2/ by an alternative dielectric is a formidable task and one must consider the task as an integrated task involving not only the gate dielectric but the equally important areas of gate dielectric-silicon interface, gate contact material and the interface between the gate contact material and the gate dielectric. Especially important is the dielectric-silicon interface as...Show More

Overview of high K gate dielectric research

J.R. Hauser

Year: 2001 | Conference Paper |

Study of low-frequency charge pumping on thin stacked dielectrics

C.E. Weintraub;E. Vogel;J.R. Hauser;Nian Yang;V. Misra;J.J. Wortman;J. Ganem;P. Masson

IEEE Transactions on Electron Devices
Year: 2001 | Volume: 48, Issue: 12 | Journal Article |
Cited by: Papers (25)
The application of low-frequency charge pumping to obtain near-interface, or bulk trap densities, on thin stacked gate dielectrics is studied. A review of the theory governing the low-frequency charge pumping technique, developed to extract bulk trap densities from metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated with thick SiO/sub 2/ dielectrics, is given. In this study, th...Show More

Study of low-frequency charge pumping on thin stacked dielectrics

C.E. Weintraub;E. Vogel;J.R. Hauser;Nian Yang;V. Misra;J.J. Wortman;J. Ganem;P. Masson

Year: 2001 | Volume: 48, Issue: 12 | Journal Article |

Estimation of the effects of remote charge scattering on electron mobility of n-MOSFETs with ultrathin gate oxides

Nian Yang;W.K. Henson;J.R. Hauser;J.J. Wortman

IEEE Transactions on Electron Devices
Year: 2000 | Volume: 47, Issue: 2 | Journal Article |
The effects of remote charge scattering on the electron mobility of n-MOSFETs with ultrathin gate oxides from 1.5 nm to 3.2 nm have been estimated. By calculating the scattering rate of the two-dimensional (2-D) electron gas at the Si/silicon dioxide interface due to the ionized doping impurities at the poly-Si/silicon dioxide interface, the remote charge scattering mobility has been calculated. E...Show More

Estimation of the effects of remote charge scattering on electron mobility of n-MOSFETs with ultrathin gate oxides

Nian Yang;W.K. Henson;J.R. Hauser;J.J. Wortman

Year: 2000 | Volume: 47, Issue: 2 | Journal Article |

A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides

K. Ahmed;J.J. Wortman;J.R. Hauser

IEEE Transactions on Electron Devices
Year: 2000 | Volume: 47, Issue: 11 | Journal Article |
Based on two-dimensional (2-D) numerical simulation, a pulsed-drain current (PDC) measurement technique in weak inversion is investigated as an alternative to the standard charge-pumping technique for the extraction of interface trap density using small geometry MOSFETs. The PDC technique was found particularly useful for small MOSFETs with sub-20 /spl Aring/ oxides to avoid high gate tunneling cu...Show More

A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides

K. Ahmed;J.J. Wortman;J.R. Hauser

Year: 2000 | Volume: 47, Issue: 11 | Journal Article |

Comparative physical and electrical metrology of ultrathin oxides in the 6 to 1.5 nm regime

K. Ahmed;E. Ibok;G. Bains;D. Chi;B. Ogle;J.J. Wortman;J.R. Hauser

IEEE Transactions on Electron Devices
Year: 2000 | Volume: 47, Issue: 7 | Journal Article |
Cited by: Papers (27)
In this work, five methods for measuring the thickness of ultra-thin gate oxide layers in MOS structures were compared experimentally on n/sup +/ poly-SiO/sub 2/-p-Si structures. Three methods are based on electrical capacitance-voltage (C-V) and current-voltage (I-V) data and the other two methods are HRTEM and optical measurement. MOS capacitors with oxide thickness in the range 17-55 /spl Aring...Show More

Comparative physical and electrical metrology of ultrathin oxides in the 6 to 1.5 nm regime

K. Ahmed;E. Ibok;G. Bains;D. Chi;B. Ogle;J.J. Wortman;J.R. Hauser

Year: 2000 | Volume: 47, Issue: 7 | Journal Article |

Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks

Zhigang Wang;C.G. Parker;D.W. Hodge;R.T. Croswell;Nian Yang;V. Misra;J.R. Hauser

IEEE Electron Device Letters
Year: 2000 | Volume: 21, Issue: 4 | Journal Article |
In this work, we demonstrate that the magnitude of flatband voltage (V/sub FB/) shift for ultrathin (<2 nm) silicon dioxide-silicon nitride (ON) gate stacks in MOSFET's depends on the Fermi level position in the gate material. In addition, a fixed positive charge at the oxide-nitride interface was observed.Show More

Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks

Zhigang Wang;C.G. Parker;D.W. Hodge;R.T. Croswell;Nian Yang;V. Misra;J.R. Hauser

Year: 2000 | Volume: 21, Issue: 4 | Journal Article |

Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L/sub eff/ and R/sub sd/ of LDD MOSFETs

K. Ahmed;I. De;C. Osburn;J. Wortman;J. Hauser

IEEE Transactions on Electron Devices
Year: 2000 | Volume: 47, Issue: 4 | Journal Article |
Cited by: Papers (6)
The purpose of this study, based on two-dimensional (2-D) simulation, was to scale effective channel length and series resistance extraction routines for sub-100 nm CMOS devices. We demonstrate that L/sub eff/- and R/sub sd/-gate-bias dependence extracted using a modified shift-and-ratio (M-S&R) method may not give accurate results because of a nonnegligible effective mobility dependence on gate b...Show More

Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L/sub eff/ and R/sub sd/ of LDD MOSFETs

K. Ahmed;I. De;C. Osburn;J. Wortman;J. Hauser

Year: 2000 | Volume: 47, Issue: 4 | Journal Article |

Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-/spl Aring/ gate oxide MOSFETs

K. Ahmed;E. Ibok;G.C.-F. Yeap;Qi Xiang;B. Ogle;J.J. Wortman;J.R. Hauser

IEEE Transactions on Electron Devices
Year: 1999 | Volume: 46, Issue: 8 | Journal Article |
This paper discusses the limitations on MOSFET test structures used in extracting the polysilicon gate doping from capacitance-voltage (C-V) analysis in strong inversion, especially for ultrathin gate oxides. It is shown that for sub-20-/spl Aring/ oxide MOS devices, transistors with channel lengths less than about 10 /spl mu/m will be needed to avoid an extrinsic capacitance roll-off in strong in...Show More

Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-/spl Aring/ gate oxide MOSFETs

K. Ahmed;E. Ibok;G.C.-F. Yeap;Qi Xiang;B. Ogle;J.J. Wortman;J.R. Hauser

Year: 1999 | Volume: 46, Issue: 8 | Journal Article |

Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics

E. Ibok;K. Ahmed;Ming-Yin Hao;B. Ogle;J.J. Wortman;J.R. Hauser

IEEE Electron Device Letters
Year: 1999 | Volume: 20, Issue: 9 | Journal Article |
Cited by: Papers (13)
Ultrathin oxynitride using plasma assisted deposition was evaluated against thermal oxide and nitrided thermal oxide as an alternative direct tunneling gate dielectric to thermal oxide in the 2.5-nm regime. The oxynitride showed an enhanced high field effective mobility relative to the thermal oxide although the low field mobility was slightly depressed. The N/sub 2/O nitrided oxide showed an enha...Show More

Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics

E. Ibok;K. Ahmed;Ming-Yin Hao;B. Ogle;J.J. Wortman;J.R. Hauser

Year: 1999 | Volume: 20, Issue: 9 | Journal Article |

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

W.K. Henson;K.Z. Ahmed;E.M. Vogel;J.R. Hauser;J.J. Wortman;R.D. Venables;M. Xu;D. Venables

IEEE Electron Device Letters
Year: 1999 | Volume: 20, Issue: 4 | Journal Article |
High-frequency capacitance-voltage (C-V) measurements have been made on ultrathin oxide metal-oxide-semiconductor (MOS) capacitors. The sensitivity of extracted oxide thickness to series resistance and gate leakage is demonstrated. Guidelines are outlined for reliable and accurate estimation of oxide thickness from C-V measurements for oxides down to 1.4 nm.Show More

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

W.K. Henson;K.Z. Ahmed;E.M. Vogel;J.R. Hauser;J.J. Wortman;R.D. Venables;M. Xu;D. Venables

Year: 1999 | Volume: 20, Issue: 4 | Journal Article |

Extraction of the gate oxide thickness of N- and P-Channel MOSFETs below 20 /spl Aring/ from the substrate current resulting from valence-band electron tunneling

A. Shanware;J.P. Shiely;H.Z. Massoud;E. Vogel;K. Henson;A. Srivastava;C. Osburn;J.R. Hauser;J.J. Wortman

International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318)
Year: 1999 | Conference Paper |
Cited by: Papers (7)
This paper introduces a method for the determination of the gate oxide thickness, X/sub ox/, of N- and P-Channel MOSFETs with ultrathin oxides based on the characterization and modeling of the substrate current resulting from valence-band electron tunneling (VBET) in the direct-tunneling (DT) regime. Under certain bias conditions, valence-band electron tunneling becomes the main constituent of the...Show More

Extraction of the gate oxide thickness of N- and P-Channel MOSFETs below 20 /spl Aring/ from the substrate current resulting from valence-band electron tunneling

A. Shanware;J.P. Shiely;H.Z. Massoud;E. Vogel;K. Henson;A. Srivastava;C. Osburn;J.R. Hauser;J.J. Wortman

Year: 1999 | Conference Paper |

Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices

N. Yang;W.K. Henson;J.R. Hauser;J.J. Wortman

IEEE Transactions on Electron Devices
Year: 1999 | Volume: 46, Issue: 7 | Journal Article |
Using both quantum mechanical calculations for the silicon substrate and a modified WKB approximation for the transmission probability, direct tunneling currents across ultra-thin gate oxides of MOS structures have been modeled for electrons from the inversion layers in p-type Si substrates. The modeled direct tunneling currents have been compared to experimental data obtained from nMOSFET's with ...Show More

Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices

N. Yang;W.K. Henson;J.R. Hauser;J.J. Wortman

Year: 1999 | Volume: 46, Issue: 7 | Journal Article |

Modeled tunnel currents for high dielectric constant dielectrics

E.M. Vogel;K.Z. Ahmed;B. Hornung;W.K. Henson;P.K. McLarty;G. Lucovsky;J.R. Hauser;J.J. Wortman

IEEE Transactions on Electron Devices
Year: 1998 | Volume: 45, Issue: 6 | Journal Article |
The effect of dielectric constant and barrier height on the WKB modeled tunnel currents of MOS capacitors with effective oxide thickness of 2.0 nm is described. We first present the WKB numerical model used to determine the tunneling currents. The results of this model indicate that alternative dielectrics with higher dielectric constants show lower tunneling currents than SiO/sub 2/ at expected o...Show More

Modeled tunnel currents for high dielectric constant dielectrics

E.M. Vogel;K.Z. Ahmed;B. Hornung;W.K. Henson;P.K. McLarty;G. Lucovsky;J.R. Hauser;J.J. Wortman

Year: 1998 | Volume: 45, Issue: 6 | Journal Article |

Ultrathin oxide-nitride gate dielectric MOSFET's

C.G. Parker;G. Lucovsky;J.R. Hauser

IEEE Electron Device Letters
Year: 1998 | Volume: 19, Issue: 4 | Journal Article |
The first ultrathin oxide-nitride (O-N) gate dielectrics with oxide equivalent thickness of less than 2 nm have been deposited and characterized in n-MOSFET's. The O-N gates, deposited by remote plasma-enhanced CVD, demonstrate reduced gate leakage when compared with oxides of equivalent thickness while retaining comparable drive currents.Show More

Ultrathin oxide-nitride gate dielectric MOSFET's

C.G. Parker;G. Lucovsky;J.R. Hauser

Year: 1998 | Volume: 19, Issue: 4 | Journal Article |

High power nitrogen-incorporating remote plasma oxidation process for MOS applications

C.G. Parker;G. Lucovsky;J.R. Hauser

IEEE Conference Record - Abstracts. 1997 IEEE International Conference on Plasma Science
Year: 1997 | Conference Paper |
Summary form only given. A 400 W remote plasma oxidation process has been developed in a cluster tool which uses N/sub 2/O and O/sub 2/ for controlling incorporated amounts of nitrogen within the grown oxide. This technique has been developed for Si/SiO/sub 2/ interface formation for addition of nitrogen at the interface. Verification through in-situ Auger electron spectroscopy demonstrates that n...Show More

High power nitrogen-incorporating remote plasma oxidation process for MOS applications

C.G. Parker;G. Lucovsky;J.R. Hauser

Year: 1997 | Conference Paper |

Bias sweep rate effects on quasi-static capacitance of MOS capacitors

J.R. Hauser

IEEE Transactions on Electron Devices
Year: 1997 | Volume: 44, Issue: 6 | Journal Article |
Cited by: Papers (14)
MOS capacitance measurements are very fundamental characterization methods for MOS and FET structures. This paper discusses the effects of a finite bias sweep rate on quasi-static and high-frequency (HF) capacitance-voltage (C-V) measurements. As typically measured, a finite sweep rate causes the transition region from inversion to depletion of the quasistatic C-V curve to be shifted by several te...Show More

Bias sweep rate effects on quasi-static capacitance of MOS capacitors

J.R. Hauser

Year: 1997 | Volume: 44, Issue: 6 | Journal Article |

Garp: a MIPS processor with a reconfigurable coprocessor

J.R. Hauser;J. Wawrzynek

Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186)
Year: 1997 | Conference Paper |
Typical reconfigurable machines exhibit shortcomings that make them less than ideal for general-purpose computing. The Garp Architecture combines reconfigurable hardware with a standard MIPS processor on the same die to retain the better features of both. Novel aspects of the architecture are presented, as well as a prototype software environment and preliminary performance results. Compared to an...Show More

Garp: a MIPS processor with a reconfigurable coprocessor

J.R. Hauser;J. Wawrzynek

Year: 1997 | Conference Paper |

Extraction of experimental mobility data for MOS devices

J.R. Hauser

IEEE Transactions on Electron Devices
Year: 1996 | Volume: 43, Issue: 11 | Journal Article |
MOS surface mobility is a fundamental material and device property which has been extensively studied both theoretically and experimentally. This work reports on a new technique for extracting surface mobility data from experimentally measured I-V data on large area MOS devices. The approach employs a least squares curve fitting technique for combining theoretical models of inversion layer charge ...Show More

Extraction of experimental mobility data for MOS devices

J.R. Hauser

Year: 1996 | Volume: 43, Issue: 11 | Journal Article |

Mobility behaviour of n-channel and p-channel MOSFETs with oxynitride gate dielectrics formed by low-pressure rapid thermal chemical vapor deposition

E.M. Vogel;W.L. Hill;V. Misra;P.K. McLarty;J.J. Wortman;J.R. Hauser;P. Morfouli;G. Ghibaudo;T. Ouisse

IEEE Transactions on Electron Devices
Year: 1996 | Volume: 43, Issue: 5 | Journal Article |
The electric field dependence of electron and hole mobility was investigated in n-channel and p-channel metal-oxide-semiconductor field-effect transistors with oxynitride gate dielectrics formed using low-pressure rapid thermal chemical vapor deposition with SiH/sub 4/, N/sub 2/O and NH/sub 3/ as the reactive gases. The peak electron mobility was observed to decrease with increasing nitrogen and h...Show More

Mobility behaviour of n-channel and p-channel MOSFETs with oxynitride gate dielectrics formed by low-pressure rapid thermal chemical vapor deposition

E.M. Vogel;W.L. Hill;V. Misra;P.K. McLarty;J.J. Wortman;J.R. Hauser;P. Morfouli;G. Ghibaudo;T. Ouisse

Year: 1996 | Volume: 43, Issue: 5 | Journal Article |

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