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Dynamic voltage and frequency management for a low-power embedded microprocessor | IEEE Journals & Magazine | IEEE Xplore

Dynamic voltage and frequency management for a low-power embedded microprocessor


Abstract:

High-performance and low-power microprocessors are key to PDA applications. A dynamic voltage and frequency management (DVFM) scheme with leakage power compensation effec...Show More

Abstract:

High-performance and low-power microprocessors are key to PDA applications. A dynamic voltage and frequency management (DVFM) scheme with leakage power compensation effect is introduced in a microprocessor with 128-bit wideband 64-Mb embedded DRAM. The DVFM scheme autonomously controls clock frequency from 8 to 123 MHz in steps of 0.5 MHz and also adaptively controls supply voltage from 0.9 to 1.6 V in steps of 5 mV, achieving 82% power reduction in personal information management scheduler application and 40% power reduction in MPEG4 movie playback. This low-power embedded microprocessor, fabricated with 0.18-/spl mu/m CMOS embedded DRAM technology, enables high-performance operations such as audio and video applications. As process technology shrinks, this adaptive leakage power compensation scheme will become more important in realizing high-performance and low-power mobile consumer applications.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 40, Issue: 1, January 2005)
Page(s): 28 - 35
Date of Publication: 31 January 2005

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I. Introduction

Dynamic voltage and/or frequency control schemes have been reported in [1]–[5]. Our approach offers both dynamic frequency control (DFC) and dynamic voltage control (DVC). Clock frequency is autonomously and dynamically controlled while supply voltage is adaptively controlled resulting in the leakage power compensation effect. This dynamic voltage and frequency management (DVFM) approach achieved 82% power reduction in a Personal Information Management (PIM) application.

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