Abstract:
In this paper, we describe our floating-gate pFET device, with its many circuit applications and supporting experimental measurements. We developed these devices in stand...Show MoreMetadata
Abstract:
In this paper, we describe our floating-gate pFET device, with its many circuit applications and supporting experimental measurements. We developed these devices in standard double-poly CMOS technologies by utilizing many effects inherent in these processes. We add floating-gate charge by electron tunneling, and we remove floating-gate charge by hot-electron injection. With this floating-gate technology, we cannot only build analog EEPROMs, we can also implement adaptation and learning when we consider floating-gate devices to be circuit elements with important time-domain dynamics. We start by discussing non-adaptive properties of floating-gate devices and we present two representative non-adaptive applications. First, we discuss using the floating-gate pFETs as non-volatile voltage sources or potentiometers (e-pots). Second, we discuss using floating-gate pFETs to build translinear circuits that compute the product of powers of the input currents. We then discuss the physics, behavior, and applications of adaptation using floating-gate pFETs. The physics of adaptation starts with floating-gate pFETs with continuous tunneling and injection currents. A single floating-gate MOS device operating with continuous-time tunneling and injection currents can exhibit either stabilizing or destabilizing behaviors. One particular application is an autozeroing floating-gate amplifier (AFGA) that uses tunneling and pFET hot-electron injection to adaptively set its DC operating point. Continuous-time circuits comprising multiple floating-gate MOS devices show various competitive and cooperative behaviors between devices. These floating-gate circuits can be used to build silicon systems that adapt and learn.
Date of Conference: 21-24 March 1999
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7695-0056-0
Print ISSN: 1522-869X
Reliability of pFET EEPROM with 70-/spl Aring/ tunnel oxide manufactured in generic logic CMOS Processes
Yanjun Ma,T. Gilliland,Bin Wang,R. Paulsen,A. Pesavento,C.-H. Wang,Hoc Nguyen,T. Humes,C. Diorio
Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits
M. Hooper,M. Kucic,P. Hasler
Time-Domain Analysis of a Phase-Shift-Modulated Series Resonant Converter with an Adaptive Passive Auxiliary Circuit
Alireza Safaee,Masoud Karimi-Ghartemani,Praveen K. Jain,Alireza Bakhshai
Calculation of Step Discontinuities in Electric Circuits: A Time-Domain Analysis
Flavio A. M. Cipparrone,Denise Consonni
Graph theory-based sneak circuit time-domain analysis and trigger of CLLC resonant converter with parasitic parameters
Chengsong Wei,Xiaoquan Zhu,Ke Jin,Yue Wu
An embedded 90 nm SONOS nonvolatile memory utilizing hot electron programming and uniform tunnel erase
C.T. Swift,G.L. Chindalore,K. Harber,T.S. Harp,A. Hoefler,C.M. Hong,P.A. Ingersoll,C.B. Li,E.J. Prinz,J.A. Yater
Time-domain analysis of circuits with frequency-dependent elements using a SPICE-like solver
Yuhang Dou,Lap K. Yeung,Ke-Li Wu
Impact of Gate Tunneling Leakage on Performances of Phase Locked Loop Circuit in Nanoscale CMOS Technology
Jung-Sheng Chen,Ming-Dou Ker