I. INTRODUCTION
FG circuits, have been evolving rapidly over the past few years. Initially they were widely used to store digital information for long periods of time in devices such as EEPROMS, EPROMS and FLASH memories. Recently analog FG circuits have been implemented in systems such as an analog Fourier processor, a silicon cochlea, a speech recognition system and an active pixel imager [1], [2], [3], [4]. Analog FG circuits are unique because they allow analog programmability. The two mechanisms which facilitate programmability are hot-electron injection and electron tunneling. Both of such mechanisms require a voltage on chip larger than the supply voltage. Currently, these voltages are supplied off chip. The programming voltages are a critical factor in analog FG circuit design. The objective of this research is to ultimately integrate the power supply in the form of charge-pumps on-chip with FG arrays in a standard sub-micron CMOS process but it first must be shown that the integration of charge pumps will function with simple floating-gate circuits as shown in Figure 1. This objective appears feasible since we used a ground up approach design of the charge-pumps which began by characterizing the rectifying structures for implementation in charge-pumps and then characterizing the charge-pumps for FG programmability [5], [6], [7].