Abstract:
The first ultrathin oxide-nitride (O-N) gate dielectrics with oxide equivalent thickness of less than 2 nm have been deposited and characterized in n-MOSFET's. The O-N ga...Show MoreMetadata
Abstract:
The first ultrathin oxide-nitride (O-N) gate dielectrics with oxide equivalent thickness of less than 2 nm have been deposited and characterized in n-MOSFET's. The O-N gates, deposited by remote plasma-enhanced CVD, demonstrate reduced gate leakage when compared with oxides of equivalent thickness while retaining comparable drive currents.
Published in: IEEE Electron Device Letters ( Volume: 19, Issue: 4, April 1998)
DOI: 10.1109/55.663529
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1.
The National Technology Roadmap for Semiconductors..
2.
H. S. Momose, M. Ono, T. Yoshitomi, T. Ohguro, S. Nakamura, M. Saito, et al., "1.5 nm direct-tunneling gate oxide Si MOSFET's", IEEE Trans. Electron Devices, vol. 43, pp. 1233-1242, 1996.
3.
S. A. Campbell, D. C. Gilmer, X. Wang, M. Hsieh, H. Kim, W. L. Gladfelter, et al., " MOSFET transistors fabricated with high permittivity TiO _2 dielectrics ", IEEE Trans. Electron Devices, vol. 44, pp. 104-108, Jan. 1997.
4.
S. M. Sze, Physics of Semiconductor Devices, 1981.
5.
S. V. Hattangady, G. G. Fountain, R. A. Rudder and R. J. Markunas, "Low hydrogen content silicon nitride deposited at low temperature by novel remote plasma technique", J. Vac. Sci. Technol. A, vol. 7, pp. 570-575, 1989.
6.
N. A. Masnari, J. R. Hauser, G. Lucovsky, D. M. Maher, R. J. Markunas, M. C. Ozturk, et al., "Center for advanced electronic materials processing", Proc. IEEE, vol. 81, pp. 42-59, 1993.
7.
Y. Ma, T. Yasuda and G. Lucovsky, "Ultrathin device quality oxide̵nitride̵oxide heterostructure formed by remote plasma enhanced chemical vapor deposition", Appl. Phys. Lett., vol. 64, pp. 2226-2228, 1994.
8.
Z. Lu, M. J. Williams, P. F. Santos-Filho and G. Lucovsky, "Fourier transform infrared study of rapid thermal annealing of a-Si:N:H(D) films prepared by remote plasma-enhanced chemical vapor deposition", J. Vac. Sci. Technol. A, vol. 13, pp. 607-613, 1995.
9.
"Critical processes for ultrathin gate oxide integrity", The Physics and Chemistry of SiO_2 and the SiO_2 Interface, pp. 352-366, 1996.
10.
S.-H. Lo, D. A. Buchanan, Y. Taur and W. Wang, "Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultrathin-oxide nMOSFET's", IEEE Electron Device Lett., vol. 18, pp. 209-211, May 1997.
