Automatic rapid programming of large arrays of floating-gate elements

The use of floating-gate elements on analog circuits has increased over the last few years. Floating-gate transistors are been used for analog multiplication, memory storage, on-chip bias, offset removals, etc. Complex systems, such as imagers and filter arrays, use thousands to millions of programmable floating-gate elements. The programming speed and precision of these elements plays a major role on the performance of these systems. In this paper we present a system approach that allows for automatic rapid programming of large arrays of floating-gates. We achieve this by optimizing all the time consuming tasks involved in the programming, such as current measurements and drain pulsing among others.

1. AUTOMATIC ARRAY PROGRAMMING

Solid-State memory arrays have been around for many years in EEPROMs [1]. Although EEPROMs are used for digital storage, similar techniques have been used to implement analog storage [2]. As these arrays have become larger, programming speed has become critical in making these arrays useful. This paper outlines a method for achieving rapid programming speeds of large array of floating-gate elements.