For the first time, we demonstrate an in-depth analysis on a novel multi-layered gate-interfacial-layer (G.IL) and high-k channel-interfacial-layer (Ch.IL) in metal-insulator-ferroelectric-insulator-silicon (MIFIS) gate stack FeFETs, using simulations and experimental validation. By exploring materials with varying energy barrier heights between the gate metal and G.IL to control the tunneling of ...Show More
