Abstract:
A simple four-quadrant analog BiCMOS multiplier that operates with /spl plusmn/0.75 V supplies is presented. The circuit uses multiple-input floating-gate transistors and...Show MoreMetadata
Abstract:
A simple four-quadrant analog BiCMOS multiplier that operates with /spl plusmn/0.75 V supplies is presented. The circuit uses multiple-input floating-gate transistors and is based on a folded Gilbert multiplier structure. It has 1 V/sub pp/ input-output signal swing and less than 1% THD over the specified range. SPICE simulations verify the operation of the circuit.
Published in: 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96
Date of Conference: 15-15 May 1996
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-3073-0
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