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Empirical Analytical Inductance Calculation and Inductance to DC Resistance Ratio Optimization of On-Chip Solenoid Magnetic-Core Inductors | IEEE Conference Publication | IEEE Xplore

Empirical Analytical Inductance Calculation and Inductance to DC Resistance Ratio Optimization of On-Chip Solenoid Magnetic-Core Inductors


Abstract:

In this paper, two empirical analytical formulas are proposed for inductance calculation of on-chip solenoid magnetic-core inductors. Compared with traditional formula, t...Show More

Abstract:

In this paper, two empirical analytical formulas are proposed for inductance calculation of on-chip solenoid magnetic-core inductors. Compared with traditional formula, the percentage of samples achieving within 10% accuracy (compared with simulation results) is greatly improved from 17% to 94% and 65% using the proposed formulas. Based on analytical inductance calculation, on-chip solenoid magnetic-core inductors are then systematically analyzed for inductance to dc resistance ratio optimization. Results show that a magnetic core length to width ratio of over 10 is preferred. The impacts of inductance value and device area are also studied. The analytical calculation agrees well with numerical simulation, and is useful for design optimization.
Date of Conference: 25-28 October 2022
Date Added to IEEE Xplore: 01 December 2022
ISBN Information:
Conference Location: Nangjing, China

Funding Agency:


I. Introduction

In recent years, the increasing demand of ultimate miniaturization of power converters leads to the development of on-chip power management inductors [1]-[7]. Due to the size and fabrication limitations, on-chip power inductors suffer from small inductance value (L) which leads to large inductor ripple current. Increasing inductor winding turns could increase inductance value, but it will also increase dc resistance (Rdc) accordingly. Considering this tradeoff, L/Rdc is usually used as a key figure-of-merit for on-chip power inductors. Introducing magnetic core into integrated circuit technology could increase L without sacrificing Rdc. Currently, the most intensely studied on-chip magnetic-core inductor structure is the solenoid structure since it requires only one magnetic layer [1]-[5]. However, due to the limited magnetic core thickness and the open-loop magnetic core design in order to save chip area, on-chip solenoid magnetic-core inductors usually have significant magnetic flux leakage and demagnetization effect. As a result, traditional inductance calculation based on magnetic core reluctance is no longer accurate for the inductor design. Therefore, in this paper, two empirical analytical formulas will be proposed and verified for inductance calculation of on-chip solenoid magnetic-core inductors. Based on analytical inductance calculation, on-chip solenoid magnetic-core inductors will also be systematically studied for L/Rdc optimization.

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