I. Introduction
In recent years, the increasing demand of ultimate miniaturization of power converters leads to the development of on-chip power management inductors [1]-[7]. Due to the size and fabrication limitations, on-chip power inductors suffer from small inductance value (L) which leads to large inductor ripple current. Increasing inductor winding turns could increase inductance value, but it will also increase dc resistance (Rdc) accordingly. Considering this tradeoff, L/Rdc is usually used as a key figure-of-merit for on-chip power inductors. Introducing magnetic core into integrated circuit technology could increase L without sacrificing Rdc. Currently, the most intensely studied on-chip magnetic-core inductor structure is the solenoid structure since it requires only one magnetic layer [1]-[5]. However, due to the limited magnetic core thickness and the open-loop magnetic core design in order to save chip area, on-chip solenoid magnetic-core inductors usually have significant magnetic flux leakage and demagnetization effect. As a result, traditional inductance calculation based on magnetic core reluctance is no longer accurate for the inductor design. Therefore, in this paper, two empirical analytical formulas will be proposed and verified for inductance calculation of on-chip solenoid magnetic-core inductors. Based on analytical inductance calculation, on-chip solenoid magnetic-core inductors will also be systematically studied for L/Rdc optimization.