A CMOS Front-End Hall Sensor Microsystem for Linear Magnetic Field Measurement With Best Tradeoff Between Sensitivity and SNR

A monolithic integrated front-end CMOS Hall sensor microsystem working at the current mode is presented for linear magnetic field measurement. The geometry of the cross-shaped Hall plates is optimized to enable the best tradeoff between current sensitivity and signal-to-noise ratio (SNR) by theoretical modeling. Furthermore, a novel current-mode four-phase spinning current method combined with the correlated double sampling demodulation technique is proposed to amplify the weak Hall current signals and to cancel the high offset and noise. Fabricated using a standard 0.18- $\mu \text{m}$ low-voltage CMOS technology, it is experimentally demonstrated that a maximum current sensitivity of 6.86%/T and an optimal SNR are achieved when the cross length-to-width ( $L/W)$ ratio of the Hall plate is about 0.4. At a supply voltage of 3.3 V, the linearity of the Hall sensor microsystem is up to 99.9% in the magnetic field range within ±200 mT. The magnetic field resolution is as low as 100 $\mu \text{T}$ , the residual offset is less than $52~\mu \text{T}$ , and the power consumption is about 15.4 mW.

I. Introduction

Due to its high reliability, high measurement accuracy, and compatibility with low-cost CMOS technology, the silicon-based Hall sensors have been widely used in various fields such as industrial control systems, consumer electronics, and automobiles for the measurements of angle, position, current, and so on [1]–[4]. The sensitivity, offset, and noise of the Hall devices are crucial factors affecting the measurement precision and resolution of Hall sensors. However, Hall sensors fabricated in standard deep submicrometer CMOS technologies, suffer from low magnetic sensitivity, serious offset, and high noise; it is therefore of great significance to improve those performances accordingly.