A Novel Sub-Cycle-Based Method for Estimation of Decaying DC Component and Fundamental Phasor

Accurate estimation of the fundamental phasors of voltage or current is a challenge to power system engineers. It becomes even more challenging when the decaying dc component (DDC) is present in the signal. This article proposes a sub-cycle-based algorithm for reducing the effect of DDC for accurate estimation of the phasor of fault current signal in the presence of odd harmonics and multiple DDCs. In the proposed algorithm, the equality property of the sinusoidal signal samples around its peak is utilized to estimate DDC with only four samples and the window length requirement of half-cycle plus two samples. A novel noise removal methodology is also proposed. The fundamental phasor is calculated by taking the difference of the half-cycle discrete Fourier transform (HCDFT) of fault current and HCDFT of DDC. Simulations are performed to show the effectiveness of the proposed method, and it is compared with few previous estimation algorithms. Tests with the system-generated signals show the efficacy and accuracy of the proposed sub-cycle-based method.

I. Introduction

Power networks are prone to faults [1]. During such faults, high current and low bus voltage magnitudes are generally encountered [1]. Digital algorithms protect the power network during faults and are based on estimating phasors (fundamental and other harmonics) [2]. The even harmonics in the fault current can be neglected due to the inherent sinusoidal nature of the ac current [3]. However, the decaying dc component (DDC) and odd harmonics in the fault current lead to inaccurate phasor estimation that deteriorates the performance of the digital protective algorithms [3].