Design of Energy Efficient True Random Number Generator using MUX-Metastable Approach

The design of a meta-stable ring oscillator-based true random number generator (TRNG) is presented in this paper. The proposed circuit is designed in 40nm CMOS technology and simulated in cadence virtuoso simulation environment using a combination of current starved-based ring oscillators (ROs), multiplexer, linear feedback shift register (LFSR), UP/DOWN counter followed by a meta-stable circuit. The current starved inverter-based RO is used in place of the power-hungry comparator to save a significant amount of power dissipation observed in the existing design. The metastable circuit is used for providing randomness in the design. The proposed design had resulted in the generation of approximately 40Mbps speed, the power dissipation of 730μW, and energy efficiency of 18.25pJ/bit when designed at 1.1V. The design is fully validated by NIST 800.22 statistical test suite. The proposed design is thus highly suitable for random number generation.

I. Introduction

With the advancement in digital technologies, security threat and cyber-attacks are increasing at an unprecedented pace and is forcing designers to make systems secure. In such systems, random number generators (RNGs) are inevitable ingredient and can be used in many applications like certificate generation, cryptographic co-processor, radio-frequency identification system, privacy-preserving mutual authentication, Monte-Carlo in statistical analysis, numerical simulations, digital signature algorithm etc [1]-[5]. The nature of RNs in such system not only decides the fate of communication and computing environment but also determines the quality and efficiency of such system. Designing a true RNG therefore becomes a challenging task as uniformity and unpredictability determines its excellence and class.