Introduction
In high performance computer systems and large-scale data centers, data movement becomes a critical problem[1]. Increasing data rates of conventional electrical links causes low latency tolerance, high power consumption, and poor signal integrity, especially for long distance interconnects. To extremely reduce the length of high-data-rate electrical links, co-packaging technologies of optics chips (e.g. silicon (Si) photonics) and high-performance large-scale integration (LSI) chips are attracted much attention. For example, Rockley Photonics showed a switch application specific integration circuits (ASICs) where Si photonics chips were co-packaged at OFC 2018, and dozen ribbon optical fiber cables were connected to it[2]. Such massively parallel optical input/outputs (I/Os) will be necessary for high performance LSIs like upcoming high-capacity switch ASICs over 51.2 Tbps.