Ultrathin gate oxide CMOS with nondoped selective epitaxial Si channel layer

The nondoped selective epitaxial Si channel technique has been applied to ultrathin gate oxide CMOS transistors. It was confirmed that drain current drive and transconductance are improved in the epitaxial channel MOSFETs with ultrathin gate oxides in the direct-tunneling regime. It was also found that the epitaxial Si channel noticeably reduces the direct-tunneling gate leakage current. The relation between channel impurity concentration and direct-tunneling gate leakage current was investigated in detail. It was confirmed that the lower leakage current in epitaxial channel devices was not completely explained by the lower impurity concentration in the channel. The results suggest that the improved leakage current in the epitaxial channel case is attributable to the improvement of some aspect of the oxide film quality, such as roughness or defect density, and that the improvement of the oxide film quality is essential for ultrathin gate oxide CMOS. AFM and 1/f noise results support that SiO/sub 2/-Si interface quality in epitaxial Si channel MOSFETs is improved. Good performance and lower leakage current of TiN gate electrode CMOS was also demonstrated.

I. Introduction

Gate oxide thinning into the direct-tunneling regime has also become one of the key issues for high-performance CMOS beyond 0.1 m before the gate oxide is replaced by high-K dielectrics. In fact, extremely high drain current of 1.2–2.3 mA/ m and transconductance of 1.0–1.9 S/mm have been reported using 1.5–1.3 nm gate SiO₂ with a supply voltage of 1.5 V [1]– [5]. The major concerns for such thin SiO₂ MOSFETs are TDDB reliability and huge total direct-tunneling gate leakage current in an LSI chip. Regarding the TDDB, recent results [6]– [9] suggest a certain possibility of 10-year reliable operation for 1.5-nm gate SiO₂ and even more down to 1.3 nm. In terms of the total direct-tunneling gate leakage current, gate SiO₂ thickness down to at least 1.5 nm is expected to be used for high-end logic applications by suppressing leakages through improvement of film uniformity [10]. Fig. 1.

Cross-sectional view of ultrathin gate oxide CMOS with nondoped epitaxitial silicon channel layer.