I. Introduction
Prototype Fast Breeder Reactor (PFBR) is under advanced stages of commissioning [1] and designs of upcoming Fast Breeder reactors are currently being done at IGCAR, Kalpakkam [2]. Distributed Digital Control System (DDCS) Architecture is followed for PFBR as shown in figure -1. The sensors and control elements are connected to Fault tolerant real time computer (RTC) based system and single board Remote Terminal Units. These systems communicate data with the centralized server and several display stations with switched local area networks [3] [4]. These networks are kept isolated for safety & security reasons. All the nodes comprising of display stations or servers are dual redundant fault tolerant systems with hardened open source operating systems [5]. Entire Instrumentation & Control (I&C) systems for the reactors is designed, developed and qualified in-house for safety and security reasons [3]. I&C systems being designed are targeted to be qualified for safety critical operations and design life of more than 3-4 decades [6]. In order to achieve this, the designs must be highly dependable, predictable and maintainable. Hence the designs must be ¥ simple and reliable with extensive diagnostics features for detecting all postulated failure modes. These I&C systems are traditionally tested with field signal simulators in Lab environments followed by environmental, EMI/EMC and seismic testing [7]. For testing long term performances of these I&C systems in actual plant like scenarios an experimental process control loop is designed, installed & commissioned at IGCAR. This paper describes the system requirements, design & implementation details of this experimental process control loop.
Distributed Digital Control System (DDCS) Architecture for FBRs