Design Techniques of Passive Devices for Broadband CMOS Millimeter-Wave Circuits

This paper deals with the challenges in the design of passive components for broadband millimeter-wave circuits in CMOS technologies. Circuit optimization techniques based on transformers and multi-tap inductors will be described. The quality-factor, consumed silicon area and bandwidth are the key optimization parameters. Design examples including a power amplifier and a Wilkinson power divider will be presented to demonstrate the effectiveness of the presented techniques.

I. Introduction

Millimeter-wave (mm-Wave) CMOS transceivers have attracted growing research interest in the past 15 years [1]. Recently, heightened attention has been drawn in the development of fully integrated 5G mm-Wave phased-array transceivers [2]. For RF circuits below 5 GHz, only single inductor or transformer will be adopted, normally at the output of the power amplifier (PA), at the input of the low-noise amplifier (LNA) and in the LC tank of the oscillator. However, due to the limited power gain at mm-Wave, the design of passive devices is of utmost importance. Fig. 1 shows the simulated power gain of a common-source amplifier in 40-nm CMOS. It is seen that the maximum power gain of a NMOS transistor at 50 GHz is less than 10 dB while it is more than 20 dB at 5 GHz. When the amplifier is terminated by at its input and output, the simulated S₂₁ is much lower than the maximum power gain. The difference between the two is called “passive gain” [3] which can be restored by applying high-quality passive matching circuits at the input and output of the amplifier. Due to the limited design margin, passive matching circuits have to be employed between each of the amplifier stage to enhance the mm-Wave performance.