Thermal stability of CoSi/sub 2/ film for CMOS salicide

We describe the relationship between the sheet resistance of Co-silicided poly-Si and various doping elements. The surface condition of the poly-Si before Co sputtering plays an important role in suppressing the "narrow line effect," in which the silicide sheet resistance degrades as the gate length decreases. Si-O and Si-C bonding takes place in the gate poly-Si during RIE processing for gate side-wall formation when there is no CVD SiO/sub 2/ gate cap. This leads to the sheet resistance degradation of CoS/sub 2/ when the gate length is reduced. The degradation becomes less severe as the weight of the ions implanted during gate poly-Si doping increases, because the bonding is inhibited by heavier ions. The best way to suppress this degradation, however, is to prevent exposure of gate poly-Si surface by implementing a CVD SiO/sub 2/ cap during gate side-wall formation. When this is done, the sheet resistance degradation does not occur even when the gate length is 0.1 /spl mu/m for all types of implanted ions. We also observed thermal stability of the sheet resistance up to 1000/spl deg/C. That can be improved, as well as narrow line effect, by using this cap process. However, the thermal stability of gate oxide TDDB depends on the type of ion implantation. The temperature at which degradation of TDDB begins rises as the weight of the implanted ions increased. This degradation depends on the grain size, and grains increase in size as the weight increases. The highest temperature before the onset of TDDB degradation is seen with in-situ phosphorus-doped n/sup +/ polysilicon, because the grain size is greatest in this case.