A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers

This paper presents a reference-free readout method for the phase-change memory (PCM) that compensates for the temperature drift of the cell resistance. The proposed method reconfigures the sense amplifier (SA) array into flash analog-to-digital converters (ADCs) in order to extract the optimum decision threshold for the given temperature from the distribution of the data output therefrom. The resolution of the reconfigured flash ADC, the number of flash ADCs for data averaging, and the required number of samples are determined for a target bit error rate of 1 ppm. The proposed SA drives a bit line (BL) rapidly with switchable current sources. A proof-of-concept prototype chip is fabricated via the 180-nm CMOS process. A single-channel readout path occupies $137 \times 27\,\,\mu \text{m}^{\mathbf {2}}$ and consumes $305~\mu \text{W}$ under a 3.3-V supply, with readout latency less than 100 ns.

I. Introduction

As the internet of things (IoT) and machine learning gain intensive interest during the wave of fourth-industrial-revolution processors, the demand for the next-generation nonvolatile memory with short access times also increases [1]. Several key advantages of the phase-change memory (PCM), such as dynamic random access memory (DRAM)-comparable latency and higher endurance and scalability than those of flash memory, have led to active research in this area [2]. Specifically, by replacing the traditional transistor with a compact ovonic threshold switch (OTS) device [3]–[8] for the selector, the area efficiency and scalability can be greatly enhanced. As an example, the 3-D cross-point structure with OTS shown in Fig. 1 shows a high cell density due to the cell size (where is the feature size) [3]–[6] and the multi-layer structure used, with peripheral circuits located below the memory array. Fig. 1.

Perspective view of the cross-point memory structure.