I. Introduction
The degradation and failure of thin dielectrics when exposed to electrical fields is one of the main front-end of line (FEOL) reliability problems of micro- and nano-electronic devices, including metal-oxide-semiconductor field effect transistors (MOSFET) [1] and non-volatile memory devices [2]–[4], among others. In almost every electronic device thin dielectrics are placed between two solid electrodes and a potential difference between them is applied, which produces many changes in the microstructure of the dielectric with the time, mainly charge trapping and de-trapping [5]–[6], bonds breaking (e.g. generation of oxygen vacancies) [7], and severe electromigration [8]. These physical changes can alter the electrical characteristics of the dielectric, leading to random telegraph noise (RTN) [9], stress-induced leakage current (SILC) [10], soft/hard dielectric breakdown (BD) [11], and resistive switching (RS). However, analyzing these behaviors at the nanoscale is not easy, as this requires the removal of (at least) one of the two solid electrodes, which unavoidably damages the dielectric beneath [12].