Modeling and analysis of conductive voltage noise for a DC-DC buck converter

Voltage noise from a synchronised buck converter is known to causes various problems in electronic system design. The power supply noise is generally related to the switching activity of the converters. Voltage noise from switching dc/dc converter shows different behaviours at switching and ringing frequencies. In this paper, we first proposal analytical expressions to evaluate voltage ripples at switching frequency with considerations of complex decoupling structures with parasitics. We also developed an equivalent RC circuit model with step sources to represent ringing noise in the switching waveform at input side of buck converter. Passive parasitics from layout are extracted from electromagnetic models of print circuit boards. Based on analysis of our proposal model, novel design methods are given to mitigate supply noise. Our analytical expressions and models have been verified with measurements on a buck converter design in a high-speed system. System performance has been improved after applying optimization techniques from buck converter design and layout suggested from our models.

I. Introduction

Switching DC-DC converters are widely used in today's electronic systems due to their high efficiency compared to linear power electronics. However, one of major challenges in the switching converters is to model and predict voltage noise caused by the nature of high and during the switching activities [1], [2]. Synchronous buck converter is one of the most popular topologies for switched-mode power supply. The voltage noise can cause functional failures and timing errors in the digital and mixed-signal systems as well as broadband electromagnetic interference (EMI) [3]–[5]. Especially for high-speed systems, the voltage noise generated from switching power suppliers can propagate through power deliver network (PDN) and cause voltage fluctuations for critical chips [6]. Those power fluctuations could significantly degrade the qualities of high-speed signals in terms of high jitter and high bit error rate [7].