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A High-Voltage Single-Emitter Reduced-Surface-Field Horizontal Current Bipolar Transistor for BiCMOS Integration | IEEE Journals & Magazine | IEEE Xplore

A High-Voltage Single-Emitter Reduced-Surface-Field Horizontal Current Bipolar Transistor for BiCMOS Integration


Abstract:

A novel high-voltage single-emitter horizontal current bipolar transistor (HCBT) is presented. Breakdown voltage improvement compared to high-speed transistor is obtained...Show More

Abstract:

A novel high-voltage single-emitter horizontal current bipolar transistor (HCBT) is presented. Breakdown voltage improvement compared to high-speed transistor is obtained with full depletion of the intrinsic collector by using implanted CMOS p-well region. Transistors with BVCEO = 10.5 V and fT = 15.8 GHz are demonstrated. Higher operating currents can be easily obtained by stretching the emitter length resulting in a flexible physical design of circuits. The transistor is fabricated in 0.18-μm HCBT BiCMOS process flow without the additional process steps and the use of additional lithography masks.
Published in: IEEE Transactions on Electron Devices ( Volume: 64, Issue: 7, July 2017)
Page(s): 3019 - 3022
Date of Publication: 23 May 2017

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I. Introduction

Bipolar transistors which have a fully depleted intrinsic collector can be used as high-voltage (HV) devices since they have increased values of breakdown voltages [1]–[7]. Furthermore, a base width modulation in such structures is suppressed allowing for aggressive scaling of the base layer, which results in a great tradeoff between common-emitter current gain ( and early voltage (, offering a good analog performance. A high-frequency performance is degraded, but devices working at the Jonhson’s limit are demonstrated [6].

References

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