Circuit Implementation of Switchable Pins in Chip Multiprocessor

Transistor scaling and voltage scaling promote the development of VLSI chip design and modern portable devices. However, transistor scaling brings dark silicon to chips. Lowering supply voltage also results in many transistors to work in near threshold voltage region in which transistors are very sensitive to voltage variation. The paper analyzes the influence of IR drop in a chip multiprocessor (CMP) architecture. Based on our previous work, we focus on the circuit implementation of the proposed switch able pin in CMP using I/O pads with on-chip low cost control circuit, and to let the microprocessor work in data mode or power mode according to various requirements. Using six of eight traditional data pins in an 8-bit RISC microprocessor as switch able pins, the entire current in power mode can be boosted by 72% compared to normal data mode. For data transmission, relative signal-to-noise ratio (rSNR) are tested and the performance of the DRAM is also discussed.

I. Introduction

Advanced fabrication technology and novel computer architecture promote future chip multiprocessors (CMPs) containing more and more cores with high performance. However, very large leakage current in submicron process and the limitation of current cooling techniques block the beneficial effects of transistor scaling. Especially for emerging portable devices, the usable space for designers is so precious that integrating heat-dissipation device into board becomes very difficult. Dark silicon, which means reducing work frequency of some modules in a chip to avoid overheating of chips, will occupy larger area in future VLSI chips [1]. Another challenge is that with supply voltage scaling, numerous transistors in future chips will work in near threshold voltage region in which even a slight voltage variation might cause error code in data transmission, and so reduce work reliability [2]. Previous work [3] has proved that a microprocessor can be designed with voltage range from 280 mV to 1.2V. It is anticipated that future chips can work in ultra-low voltage with numerous cores. Complicated placement as well as route, and unique power distribution might lead to serious IR drop for future chips, which might amplify the risk of working in near threshold voltage region for future chips.