I. Introduction
Metal oxide based resistive random access memory (RRAM) devices are among the potential candidates for next generation non-volatile memory technology [1]. However, consideration of resistive memories as a viable alternative to the existing FLASH memory technology would require comparable performance in terms of power consumption. The requirement of a separate high-voltage forming step [2], large operating current [3] and reset power [4] remain some of the key issues in this regard. Although some recent reports have shown significant reduction in operating current, device operation even in highly scaled devices often requires tens of [1]. H. Tian et al. recently demonstrated an order of magnitude reduction of operating current by using graphene as an interfacial layer between the top electrode and the dielectric [4]. J. Yao et al. have demonstrated optically transparent RRAM in cross-bar structures using graphene as both top and bottom electrodes [5]. These recent works indicate the feasibility of graphene as an electrode material for resistive memories. We have previously demonstrated forming-free switching with low current operation () in graphene-insulator-graphene (G-I-G) structures with a dielectric stack of TiOx(1 nm)/Al2O3(1 nm)/TiO2(1 nm) [6]. The devices demonstrated a reduction in operating current in comparison to devices with conventional electrodes. In this letter, we demonstrate forming-free switching with ultra-low current operation down to 180 nA in G-I-G RRAMs by combining the use of graphene electrodes with dielectric engineering. The origin of low current operation with graphene electrodes [6] or graphene interlayer [4] has not been previously investigated. In this letter, we have investigated the switching mechanism as well the origin of low current operation in G-I-G RRAMs with electrical and physical characterization techniques.