An 80-dB DR, 7.2-MHz Bandwidth Single Opamp Biquad Based CT $\Delta \Sigma$ Modulator Dissipating 13.7-mW

A novel low power compact loop filter using a single amplifier biquad (SAB) network is presented for continuous-time (CT) delta-sigma (ΔΣ) modulators. This new technique reduces power consumption and die area by minimizing the number of active elements and simplifying the modulator topology. The new SAB network has a transfer function (TF) zero, which implements a local feedforward (FF) path in system-level diagram. By having a local FF branch embedded in the SAB network, the FF branches to the summing block in the SAB based feedforward modulator topology is reduced to half the number of FF branches in the conventional topology. Consequently, the SAB based modulator utilizes a switch-capacitor (SC) adder replacing the commonly used CT adder and the sample & hold blocks in the conventional architecture. The SAB based loop filter with reduced FF branches simplifies the design and implementation of the high-order continuous-time ΔΣ modulator. The proposed loop filter is a general filter, which can be used for both high and low oversampling ratios (OSRs). A 4th-order low pass continuous-time ΔΣ modulator is designed and implemented in 130 nm process to confirm the effectiveness of the proposed techniques. Within a 7.2 MHz signal bandwidth, the measured dynamic range and SFDR of this prototype IC are 80 dB and 83.1 dB, respectively, and the total power consumption of 13.7 mW.

I. Introduction

Future wireless communication products require high-performance analog-to-digital converters (ADCs) that have wide signal bandwidths up to several megahertz and resolutions of more than 10 bits. However, the reduction in supply voltage that accompanies reduced transistor dimensions makes it difficult to realize high performance analog circuits. With the reduction in supply voltage, the dynamic range is also reduced. To keep the same performance, either the architecture must be changed or the thermal noise of the analog components must be reduced, which in turn will normally increase the power dissipation. Discrete-time (DT) modulators with 4 MHz bandwidth and resolutions of 11 bits have been reported [1]–[3]. Compared with DT converters, CT converters have the advantages of lower power consumption and inherent anti-aliasing filtering. Additionally, they do not suffer from noise aliasing because of the continuous-time loop filter. Moreover, the absence of stringent settling requirements enables CT converters to digitize signals up to several hundred MHz [4], which is still not possible for their DT counterparts. All these advantages result in an extended battery life and reduced system complexity, which are especially important for portable wireless devices.