Reduction of Equivalent Series Inductor Effect in Delay-Ripple Reshaped Constant On-Time Control for Buck Converter With Multilayer Ceramic Capacitors

The stability of conventional constant on-time control buck converter is constrained by the time constant, which is the product of the output capacitor and its equivalent series resistance (ESR). Specialty polymer capacitor which is mostly used as output capacitor for such a consideration although it limits the performance of converter. On the other hand, the multilayer ceramic capacitors are widely used in commercial power management ICs due to the advantages of low cost and ESR. However, the stability often confronts with the subharmonic problem caused by small time constant. A differential-zero compensator with the noise margin enhancement (DZC-NME) technique in constant on-time control buck dc-dc converter with output ceramic capacitor is proposed in this paper. Thus, the proposed DZC-NME technique not only eliminates the limit of large time constant but also tolerates the existence of equivalent series inductor (ESL) effect. Experiment results demonstrate small output ripple of 10 mV and high efficiency of 91% when ESR is smaller than 1 mΩ and large interference from ESL effect is 40 mV.

I. Introduction

Power management module plays an important role in portable products to extend the battery life and provide the high-quality power supply [1]–[4]. There are various kinds of topology for meeting different required specifications and applications [5]–[11]. As a result, the constant on-time (COT) control has been widely used due to its high efficiency, good transient response, and simple control mechanism [12], [13]. As illustrated in Fig. 1, conventional COT control in the buck converter is constructed by comparator, on-time timer, MOSFETs as switches, and the energy storage components, inductor, and capacitors. Once the feedback voltage falls below the reference voltage and is detected by the comparator, the one-shot timer is triggered to increase the inductor current until a predefined on-time expires. To ensure system stability, the inductor current information derived from the output ripple is used as the ramp signal in the pulsewidth modulation (PWM) to determine duty cycle. Basically, in Fig. 2, the output voltage ripple caused by the inductor current ripple contains three major terms, which are , and contributed by the parasitic effect on the equivalent series inductance (ESL), the equivalent series resistance (ESR), and the output capacitor , respectively. Fig. 1.

Architecture of the COT control in conventional dc–dc buck converter.

Fig. 2.

Relationship between the output voltage ripple and the inductor current under different .