I. Introduction
The use of nanoscale memristive devices as synapses in artificial neural circuits has been the subject of a great deal of recent research. Induced by the demonstration of resistive switches by HP Labs [1], a major focus has been on implementing a pair-based spike-timing-dependent plasticity learning mechanism [2]. To date, most solutions involve pulse width or height modulation [3], [4], require extensive circuitry, and fail to mimic neurobiological systems. A more plausible proposal uses specific shapes for bidirectional action potentials to obtain the desired temporally asymmetric characteristics [5]. And although emulation of part of the visual cortex has been reported with this method [6], it is unclear from the device density and power dissipation viewpoints whether a brain-scale system is achievable. In fact, designing layouts to realize the necessary metrics may prove difficult for all silicon complementary metal-oxide semiconductor (CMOS) neuromorphic systems due to their 2-D nature.