I. Introduction
The rapid increase in the number of communication standards has intensified the research effort for a multi-band multimode wireless receiver. Employing a high-performance ADC near the antenna has been considered an attractive architecture for multi-band multi-mode wireless communication, since it can take advantage of signal processing power and reconfigurability of DSPs. Unfortunately, designing a high performance ADC at radio frequency (RF) is not an easy task. Although there have been several attempts for direct RF sampling bandpass ADCs at GHz range [1], [2], [3], their power consumption and area are very large due to the high speed DACs and Gm-LC filters that use multiple on-chip spiral inductors. Moreover, frequency range of the ADC is very limited as the stability of the ADC is highly sensitive to coefficients of the loop, thus making them unsuitable for multi-band applications. While a time-based ADC employing time-interleaved VCOs [4] requires an antialias bandpass filter at its input, it is a promising architecture for multi-band multi-mode applications as it consumes lowpower, small area and has widely tunable frequency without suffering from any stability issue.