Abstract:
A flexible solution for hardware implementation of an IR-UWB testbed processing unit is presented on this paper. The FPGA-DSP hybrid architecture satisfies the reconfigur...Show MoreMetadata
Abstract:
A flexible solution for hardware implementation of an IR-UWB testbed processing unit is presented on this paper. The FPGA-DSP hybrid architecture satisfies the reconfigurability requirements of a testbed and provides enough processing power needed for an UWB communication. The proposed solution has been used to implement an UWB testbed for ranging and low data rate communications that complies with regulations of European Union for UWB communication.
Published in: 2009 IEEE International Conference on Ultra-Wideband
Date of Conference: 09-11 September 2009
Date Added to IEEE Xplore: 16 October 2009
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