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A 2.5 GHz low phase noise oscillator design in 65nm CMOS technology with reduced current consumption

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Siegfried Dossou; S. Joblot; D. Petit; P. Ancey
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Abstract:

A 2.5 GHz low phase noise oscillator is presented in this paper. The oscillator was design using a Solidly Mounted BAW Resonator (SMR BAW) as resonant element. The resona...Show More

Metadata

Abstract:

A 2.5 GHz low phase noise oscillator is presented in this paper. The oscillator was design using a Solidly Mounted BAW Resonator (SMR BAW) as resonant element. The resonator exhibits a parallel resonance Q factor around 1300 at 2.54 GHz. The core oscillator was designed using STMicroelectronics 65 nm CMOS technology. It exhibits 632 mV output (zero-to-pic) with phase noise performance of -92 dBc/Hz, -109 dBc/Hz, and -130 dBc/Hz at 2 KHz, 10 KHz and 100 KHz respectively. It consumes 1 mA from a 1.2 V source.
Published in: 2008 IEEE International Conference on Electron Devices and Solid-State Circuits
Date of Conference: 08-10 December 2008
Date Added to IEEE Xplore: 23 January 2009
ISBN Information:
DOI: 10.1109/EDSSC.2008.4760724
Conference Location: Hong Kong, China
References is not available for this document.
Contents

I. INTRODUCTION

The telecommunication and especially personal communication field are in constant evolution, waiting for new applications. This is a major challenge for RF designers who have to deal with numerous standard and more stringent specifications. All these applications need somehow a reference frequency to run. The development of high-Q resonator such as Bulk Acoustic Wave (BAW) resonator is very helpful but will not overshadow a major concern in oscillator design, the noise.

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