1. INTRODUCTION
Power consumption has become one of the most important issues in modern electronics due to increased complexity and speed of the system. In order to curb the effect of power on a system as a whole, multiple power domains have been proposed as an architecture scheme for low power design. To support multi-Vdd, an array of supply voltages need to be generated. DC/DC converters can be integrated on chip and convert the input voltage to different voltage levels internally. Recently, a great deal of research [1]–[5] has been devoted to improving the power efficiency and reducing the area cost of on-chip DC/DC converters. However, there are still many unsolved problems. For instance, the basiclinear regulator and the charge-recycling voltage regulator are designs that have been looked at as candidates for on-chip integration because there are no filter elements. However, the relative low power efficiency, typically less than 80% [1], of these designs has limited their application.