Contents I. Introduction
Metal electrodes with Hf-based high dielectric constant (high-k) dielectrics have been proposed as an alternative to poly-Si/Sifr, gate stack as complementary metal-oxide-semiconductor (CMOS) devices scale to meet the 45-nm and below technology node requirements. For metal/high-k technology, identifying suitable effective work function electrodes (n-FET: 4.0-4.2 eV; p-FET: 4.9-5.1 eV) to obtain low threshold voltage [1] and optimization of the Hf-based dielectric to improve device performance are still serious challenges [2]. In particular, electron mobility degradation and Vtinstability due to fast transient charging (FTC), which occurs at preexisting electron traps, are one of the major concerns for implementing high-k dielectrics. The physical origin of these electron traps in the Hf-based high-k stack (e.g., Hf02) is unclear but has been proposed to be related to dielectric lattice defects such as positively charged oxygen vacancies, as well as the crystallinity of the high-k dielectric [3]–[5]. Optimization of the Hf02 processing such as N incorporation [6] or use of HfSiOxNy[5], [7] have shown to reduce the charge-trapping effects. Interestingly, metal electrodes are found to add additional complexity to this problem due to the interaction between metal electrode and high-k dielectric stacks [8] or changes in the gate stack from the metal electrode process [9]. In this letter, a correlation between the source of FTC and physical changes in the gate stack is investigated by studying the impact of metal gate electrodes on mobility degradation. HfSix deposited by chemical vapor deposition (CVD) is found to induce oxygen scavenging in the dielectric, and oxygen vacancies formed within the dielectric stack could in turn increase FTC.
