Ultrathin-body SOI devices as a CMOS technology downscaling option: RF perspective

Based on a careful physical description, the RF performance of ultrathin-body (down to 3 nm) silicon-on-insulator transistors is investigated. While the mobility reduction in a thin Si film slightly degrades the peak cutoff frequency and the maximum frequency of high-performance cross-coupled pair-based RF oscillators, the changes in feedback capacitance improve the low operating power and high-performance wideband and power operation of RF circuits. Also, the influence of various gate stacks on the benefits of downscaling is investigated. Fully silicided gates will enable to benefit from gate-length downscaling from an RF perspective down to 9 nm if the finger width is kept below 6 /spl mu/m, and deposited metal gates have the potential to provide advantages if the total interface resistivity is below 6-7 /spl Omega//spl middot//spl mu/m/sup 2/. Finally, the effect of series resistance at the source/drain is quantified. The device RF performance decreases by 10% per 100 /spl Omega//spl middot//spl mu/m of series resistance.

I. Introduction

The INTENSIVE downscaling of CMOS transistors has been the major driving force behind the growth of the semiconductor industry for the past 20–30 years. However, standard bulk decananometer transistors severely suffer from short-channel effects (SCEs), and even if they are still considered down to the 45-nm node, other device architectures such as ultrathin-body silicon-on-insulator (UTB-SOI) transistors are being investigated [1] to continue improving device performance and follow the International Technology Roadmap for Semiconductors (ITRS) roadmap [2].