Effects of voids on bump chip carrier (BCC++) solder joint reliability

In this study, the effects of voids on the solder joint reliability of bump chip carrier (BCC++) packages on a printed circuit board are investigated. Emphasis is placed on the void size, void location, and void percentage. The solder is assumed to obey the Garofalo-Arrhenius creep constitutive equation. A total of 12 different cases are studied. In addition, the effects of voids on the crack growth in the BCC++ solder joint are studied by the fracture mechanics method. Emphasis is placed on the demonstration that a crack in the solder joint may be stopped by a void in front of it.

(1) Introduction

Packages with low cost, low profile, lightweight, small footprint, fine pitch, and outstanding electrical and thermal performance are excellent candidates for miniature products such as cellular phones, digital cameras, personal digital assistants (PDA), and photonic devices. BCC (Bump Chip Carrier) [1] is one of the most popular packages for these products.