A Low Power 100 GHz Static CML Frequency Divider in 0.18 μm SiGe BiCMOS Technology

A100 GHz wideband static divider is implemented on a 0. 1S$\mu$mSiGe BiCMOS technology. The divider achieves a self-resonant frequency (SRF) of 92.5 GHz with a maximum dividing frequency of 100 GHz. The required input power is less than 0dBm across the entire operating range. The divider consumes 66 mW. The circuit has a 100 x SO $\mu \mathrm{m}^{2}$ active area

I. Introduction

Frequency dividers (FD) are one of the essential building blocks in mm-wave circuits such as phase-lock loop (PLL) [1] and signal generators [2]. As communication systems go to higher and higher frequencies, there is a greater need for FDs with a large dividing range and low power consumption.