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Bin Li - IEEE Xplore Author Profile

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We introduce a spatially explicit statistical downscaling (SESD) method that fuses multiscale geospatial data with the soil moisture (SM) product from NASA's SM Active and Passive (SMAP) satellite. The multiscale data included the 9-km resolution SMAP SM image, 1-km resolution normalized difference vegetation index (NDVI), 1-km digital elevation model (DEM), 1-km resolution MODIS land surface temp...Show More
The end of Dennard scaling has led to a large amount of inactive or significantly underclocked transistors on modern chip multiprocessors in order to comply with the power budget and prevent the processors from overheating. This so-called dark silicon is one of the most critical constraints that will hinder the scaling with Moore's Law in future. While advanced cooling techniques, such as liquid c...Show More
Performance variability, stemming from non-deterministic hardware and software behaviors or deterministic behaviors such as measurement bias, is a well-known phenomenon of computer systems which increases the difficulty of comparing computer performance metrics. Conventional methods use various measures (such as geometric mean) to quantify the performance of different benchmarks to compare compute...Show More
In recent years, single-ISA heterogeneous chip multiprocessors (CMP) consisting of big high-performance cores and small power-saving cores on the same die have been proposed for the exploration of high energy-efficiency. On such heterogeneous platforms, an appropriate runtime scheduling policy lies at the heart of program executions to benefit from the processor heterogeneity. To date, most prior ...Show More
Soft errors have been significantly degrading the reliability of current processors whose feature sizes and supply voltages are fast scaling down. In this paper, we propose two effective approaches to characterize processor reliability against soft errors at presilicon stage. By utilizing a rule search strategy named Patient Rule Induction Method (PRIM), we are capable of generating a set of selec...Show More
Architectural vulnerability factor (AVF) characterizes a processor's vulnerability to soft errors. Interthread resource contention and sharing on a multithreaded processor (e.g., SMT, CMP) shows nonuniform impact on a program's AVF when it is co-scheduled with different programs. However, measuring the AVF is extremely expensive in terms of hardware and computation. This paper proposes a scalable ...Show More
Traditional design space exploration mainly focuses on performance and power consumption. However, as one of the first-class constraints for modern processor design, the relationship between hard-error reliability and processor configurations has not been well studied. In this paper, we investigate this relationship by exploring a large processor design space. We employ a rule search strategy, i.e...Show More
Architectural Vulnerability Factor (AVF) [3] quantifies the probability that a raw soft error finally produces a visible error in the program output. It is often used by computer designers as an important reliability metric at the architectural level. However, the AVF measurement is extremely expensive in terms of hardware and computation. In this paper, we characterize and predict a program's AVF...Show More
In recent years, modern graphics processing units have been widely adopted in high performance computing areas to solve large scale computation problems. The leading GPU manufacturers Nvidia and ATI have introduced series of products to the market. While sharing many similar design concepts, GPUs from these two manufacturers differ in several aspects on processor cores and the memory subsystem. In...Show More
Graphics Processing Units (GPUs) have emerged as a promising platform for parallel computation. With a large number of processor cores and abundant memory bandwidth, GPUs deliver substantial computation power. While providing high computation performance, a GPU consumes high power and needs sufficient power supplies and cooling systems. It is essential to institute an efficient mechanism for evalu...Show More
We present a comprehensive study on the performance and power consumption of a recent ATI GPU. By employing a rigorous statistical model to analyze execution behaviors of representative general-purpose GPU (GPGPU) applications, we conduct insightful investigations on the target GPU architecture. Our results demonstrate that the GPU execution throughput and the power dissipation are dependent on di...Show More
High-performance processors suffer from soft error vulnerability due to the increasing on-chip transistor density, shrinking processor feature size, lower threshold voltage, etc. In this paper, we propose to use a rule search strategy, i.e. Patient Rule Induction Method (PRIM), to optimize processor soft error robustness. By exploring a huge microarchitectural design space on the Architectural Vul...Show More
The shrinking processor feature size, lower threshold voltage, and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerability Factor (AVF) reflects the possibility that a transient fault eventually causes a visible error in the program output, and it indicates a system's susceptibility to transient faults. Therefore, the awareness of the AV...Show More
We study the problem of detecting and profiling terrorists using a combination of an ensemble classifier, namely random forest and relational information. Given a database for a set of individuals characterized by both "local" attributes such as age and criminal background, and "relational" information such as communications among a subset of the individuals, with a subset of the individuals label...Show More
Application features such as port numbers are used by network-based intrusion detection systems (NIDSs) to detect attacks coming from networks. System calls and the operating system related information are used by host-based intrusion detection systems (HIDSs) to detect intrusions towards a host. However, the relationship between hardware architecture events and denial-of-service (DoS) attacks has...Show More