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P. Liu - IEEE Xplore Author Profile

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Neuron thin-film transistors (TFTs) with coplanar control gates based on RF sputtering-deposited amorphous indium–gallium–zinc oxide (IGZO) layer are fabricated. Two coplanar control gates, capacitively coupled with the floating gate, can effectively control the neutron TFT. The drain current of the TFT can be controlled by the logic states (and the voltage magnitude) of the control gates, which i...Show More
Multilevel high-resistance states are achieved in TiN/HfOx/Pt resistive switching random access memory device by controlling the reset stop voltage. Impedance spectroscopy is used to study the multilevel high-resistance states. It is shown that the high-resistance states can be described with an equivalent circuit consisting of the major components $R_{s}$ , $R$ , and $C$ corresponding to the ...Show More
Implantation of high dose, high energy blanket boron buried layers into p-type silicon is becoming increasingly attractive for leading edge CMOS technology. Implanted p/sup +/ buried layers provide several device and circuit benefits, such as superior latch-up immunity as compared to thin epi, and secondary defect gettering of other point defects. We have demonstrated that a 1/spl times/10/sup 15/...Show More
Nitrogen implantation into the channel region was used for the reduction of the "Reverse Short Channel Effect(RSCE)". This approach was found to be very effective in reducing the RSCE without adverse effects on the short channel behavior. The reduction of the RSCE is believed to be due to the implanted nitrogen ions. These implanted nitrogen ions retards the redistribution of the channel boron con...Show More
A model for current-voltage characteristics of an EEPROM cell has been developed and used in the simulation of an EEPROM test structure. It provides an explanation for the observed strong drain-induced barrier lowering effect and the role of trapped charge in the floating gate. In this model, the surface potential is related to the terminal voltages through an equivalent electrical circuit. Charge...Show More
A new merged current-mode sense-amplifier engaging current conveyor for column sensing and current-mode CMOS cross-coupled latch as its global sense-amplifier is presented. The sensing speed of this circuit topology proves to be faster than that of the conventional current sense-amplifier. The new current sense-amplifier is insensitive to both bit-like and data-like capacitances. The sensing speed...Show More