In this paper, the authors present a system structure for FPGA-based SOPC (system on programmable chip) design which uses an embedded processor to do scheduling to the HDL modules as its hard tasks. This kind of structure is implemented on the NIOS-II system offered by ALTERA and uses muC/OS-II as a real-time kernel in the embedded soft processor. The structure of the system is introduced in detai...Show More
A new road boundary detection algorithm based on the double filtering is proposed. This approach employs two filters, such as the filter with edge distribution function (EDF) and the dynamic programming (DP). Only the pixels with similar orientation to the road direction are kept using the EDF filter. Then the filter of the DP is performed. In the DP processing, all the edge candidates which are d...Show More
An updated expressway lane departure identification which based on a combination of the lane boundaries detection method and lane following with searching of the region of interest on Hough domain were proposed in this paper. After preprocessing captured road images, we employed mathematical morphology technique to obtain edge map and Hough Transform (HT) to detect lane candidates. To estimate lan...Show More
