Raghavendra Pradyumna Pothukuchi - IEEE Xplore Author Profile
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Raghavendra Pradyumna Pothukuchi

Publications
10
Citations
62
Publications by Year
20162024
Co-Authors:
Show All Co-Authors (24)
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Raghavendra Pradyumna Pothukuchi

Affiliation

Yale University, United States of America

Publication Topics

Biography

Raghavendra Pradyumna Pothukuchi is an associate research scientist and a CRA/NSF Computing Innovation Fellow at Yale University, New Haven, CT, 06511, USA. His research interests include computer architecture and systems, and he has interdisciplinary interest in cognitive science, quantum computing, and brain–computer interfaces. Pothukuchi received his Ph.D. degree in computer science from the University of Illinois at Urbana-Champaign. Contact him at raghav.pothukuchi@yale.edu.(Based on document published on 8 May 2023).
Publications
10
Citations
62
Publications by Year
20162024
Co-Authors:
Show All Co-Authors (24)
Author's Published Works

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FriendlyFoe: Adversarial Machine Learning as a Practical Architectural Defense Against Side Channel Attacks

Hyoungwook Nam;Raghavendra Pradyumna Pothukuchi;Bo Li;Nam Sung Kim;Josep Torrellas

2024 33rd International Conference on Parallel Architectures and Compilation Techniques (PACT)
Year: 2024 | Conference Paper |
Machine learning (ML)-based side channel attacks have become prominent threats to computer security. These attacks are often powerful, as ML models easily find patterns in signals. To address this problem, this paper proposes dynamically applying Adversarial Machine Learning (AML) to obfuscate side channels. The rationale is that it has been shown that intelligently injecting an adversarial pertur...Show More

FriendlyFoe: Adversarial Machine Learning as a Practical Architectural Defense Against Side Channel Attacks

Hyoungwook Nam;Raghavendra Pradyumna Pothukuchi;Bo Li;Nam Sung Kim;Josep Torrellas

Year: 2024 | Conference Paper |

Distributed Brain–Computer Interfacing With a Networked Multiaccelerator Architecture

Raghavendra Pradyumna Pothukuchi;Karthik Sriram;Michał Gerasimiuk;Muhammed Ugur;Rajit Manohar;Anurag Khandelwal;Abhishek Bhattacharjee

IEEE Micro
Year: 2024 | Volume: 44, Issue: 4 | Magazine Article |
SCALO is the first distributed brain–computer interface (BCI) consisting of multiple wireless-networked implants placed on different brain regions. SCALO unlocks new treatment options for debilitating neurological disorders and new research into brainwide network behavior. Achieving the fast and low-power communication necessary for real-time processing has historically restricted BCIs to single b...Show More

Distributed Brain–Computer Interfacing With a Networked Multiaccelerator Architecture

Raghavendra Pradyumna Pothukuchi;Karthik Sriram;Michał Gerasimiuk;Muhammed Ugur;Rajit Manohar;Anurag Khandelwal;Abhishek Bhattacharjee

Year: 2024 | Volume: 44, Issue: 4 | Magazine Article |

HALO: A Hardware–Software Co-Designed Processor for Brain–Computer Interfaces

Karthik Sriram;Ioannis Karageorgos;Xiayuan Wen;Ján Veselý;Nick Lindsay;Michael Wu;Lenny Khazan;Raghavendra Pradyumna Pothukuchi;Rajit Manohar;Abhishek Bhattacharjee

IEEE Micro
Year: 2023 | Volume: 43, Issue: 3 | Magazine Article |
Cited by: Papers (2)
Brain–computer interfaces (BCIs) enable direct communication with the brain, providing valuable information about brain function and enabling novel treatment of brain disorders. Our group has been building Hardware Architecture for Low-power BCIs (HALO), a flexible and ultralow-power processing architecture for BCIs. HALO can process up to 46 Mbps of neural data, a significant increase over the in...Show More

HALO: A Hardware–Software Co-Designed Processor for Brain–Computer Interfaces

Karthik Sriram;Ioannis Karageorgos;Xiayuan Wen;Ján Veselý;Nick Lindsay;Michael Wu;Lenny Khazan;Raghavendra Pradyumna Pothukuchi;Rajit Manohar;Abhishek Bhattacharjee

Year: 2023 | Volume: 43, Issue: 3 | Magazine Article |

Maya: Using Formal Control to Obfuscate Power Side Channels

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros G. Voulgaris;Alexander Schwing;Josep Torrellas

IEEE Micro
Year: 2022 | Volume: 42, Issue: 4 | Magazine Article |
The security of computers is at risk because of information leaking through their power consumption. Attackers can use advanced signal measurement and analysis to recover sensitive data from this side channel. To address this problem, this article presents Maya, a simple and effective defense against power side channels. The idea is to use formal control to re-shape the power dissipated by a compu...Show More

Maya: Using Formal Control to Obfuscate Power Side Channels

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros G. Voulgaris;Alexander Schwing;Josep Torrellas

Year: 2022 | Volume: 42, Issue: 4 | Magazine Article |

Distill: Domain-Specific Compilation for Cognitive Models

Ján Veselý;Raghavendra Pradyumna Pothukuchi;Ketaki Joshi;Samyak Gupta;Jonathan D. Cohen;Abhishek Bhattacharjee

2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)
Year: 2022 | Conference Paper |
Cited by: Papers (1)
Computational models of cognition enable a better understanding of the human brain and behavior, psychiatric and neurological illnesses, clinical interventions to treat illnesses, and also offer a path towards human-like artificial intelligence. Cognitive models are also, however, laborious to develop, requiring composition of many types of computational tasks, and suffer from poor performance as ...Show More

Distill: Domain-Specific Compilation for Cognitive Models

Ján Veselý;Raghavendra Pradyumna Pothukuchi;Ketaki Joshi;Samyak Gupta;Jonathan D. Cohen;Abhishek Bhattacharjee

Year: 2022 | Conference Paper |

Control Systems for Computing Systems: Making computers efficient with modular, coordinated, and robust control

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros G. Voulgaris;Josep Torrellas

IEEE Control Systems Magazine
Year: 2020 | Volume: 40, Issue: 2 | Magazine Article |
Cited by: Papers (4)
Computing is taking a central role in advancing science, technology, and society, facilitated by increasingly capable systems. Computers are expected to perform a variety of tasks, including life-critical functions, while the resources they require (such as storage and energy) are becoming increasingly limited. To meet expectations, computers use control algorithms that monitor the requirements of...Show More

Control Systems for Computing Systems: Making computers efficient with modular, coordinated, and robust control

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros G. Voulgaris;Josep Torrellas

Year: 2020 | Volume: 40, Issue: 2 | Magazine Article |

Yukta: Multilayer Resource Controllers to Maximize Efficiency

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros Voulgaris;Josep Torrellas

2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA)
Year: 2018 | Conference Paper |
Cited by: Papers (15)
Since computers increasingly execute in constrained environments, they are being equipped with controllers for resource management. However, the operation of modern computer systems is structured in multiple layers, such as the hardware, OS, and networking layers—each with its own resources. Managing such a system scalably and portably requires that we have a controller in each layer, and that the...Show More

Yukta: Multilayer Resource Controllers to Maximize Efficiency

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros Voulgaris;Josep Torrellas

Year: 2018 | Conference Paper |

Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency

Raghavendra Pradyumna Pothukuchi;Amin Ansari;Bhargava Gopireddy;Josep Torrellas

2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT)
Year: 2017 | Conference Paper |
Cited by: Papers (2)
Networks-on-Chip (NoCs) in chip multiprocessors are prone to within-die process variation as they span the whole chip. To tolerate variation, their voltages (Vdd) carry over-provisioned guardbands. As a result, prior work has proposed to save energy by operating at reduced Vdd while occasionally suffering and fixing errors. Unfortunately, these proposals use heuristic controller designs that provi...Show More

Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency

Raghavendra Pradyumna Pothukuchi;Amin Ansari;Bhargava Gopireddy;Josep Torrellas

Year: 2017 | Conference Paper |

Multilayer Compute Resource Management with Robust Control Theory

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros Voulgaris;Josep Torrellas

2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT)
Year: 2017 | Conference Paper |
Multicores increasingly execute in constrained environments, and are being equipped with controllers for resource management. However, modern multicore systems are structured in multiple complex layers, such as the hardware, OS, and networking layers, each with its own resources. Managing such a system scalably and portably requires that we have a controller in each layer, and that the different c...Show More

Multilayer Compute Resource Management with Robust Control Theory

Raghavendra Pradyumna Pothukuchi;Sweta Yamini Pothukuchi;Petros Voulgaris;Josep Torrellas

Year: 2017 | Conference Paper |

Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures

Raghavendra Pradyumna Pothukuchi;Amin Ansari;Petros Voulgaris;Josep Torrellas

2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA)
Year: 2016 | Conference Paper |
As processors seek more resource efficiency, they increasingly need to target multiple goals at the same time, such as a level of performance, power consumption, and average utilization. Robust control solutions cannot come from heuristic-based controllers or even from formal approaches that combine multiple single-parameter controllers. Such controllers may end-up working against each other. What...Show More

Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures

Raghavendra Pradyumna Pothukuchi;Amin Ansari;Petros Voulgaris;Josep Torrellas

Year: 2016 | Conference Paper |

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