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Pratyush Dhingra - IEEE Xplore Author Profile
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Pratyush Dhingra

Publications
3
Citations
1
Publications by Year
20242025
Co-Authors:
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Pratyush Dhingra

Affiliation

Department of Electrical Engineering and Computer Science
Washington State University
Pullman, WA, USA

Publication Topics

Biography

Pratyush Dhingra (Graduate Student Member, IEEE) received the BE degree from NSIT, Delhi University, New Delhi, India, in 2019. He is currently working toward the PhD degree in computer engineering with Washington State University, Pullman, WA, USA. His current research interests include design of reliable Processing-In-Memory (PIM) Architectures for ML.(Based on document published on 1 January 2025).
Publications
3
Citations
1
Publications by Year
20242025
Co-Authors:
Show All Co-Authors (7)
Author's Published Works

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Atleus: Accelerating Transformers on the Edge Enabled by 3D Heterogeneous Manycore Architectures

Pratyush Dhingra;Janardhan Rao Doppa;Partha Pratim Pande

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year: 2025 | Early Access Article |
Transformer architectures have become the standard neural network model for various machine learning applications including natural language processing and computer vision. However, the compute and memory requirements introduced by transformer models make them challenging to adopt for edge applications. Furthermore, fine-tuning pre-trained transformers (e.g., foundation models) is a common task to...Show More

Atleus: Accelerating Transformers on the Edge Enabled by 3D Heterogeneous Manycore Architectures

Pratyush Dhingra;Janardhan Rao Doppa;Partha Pratim Pande

Year: 2025 | Early Access Article |

HpT: Hybrid Acceleration of Spatio-Temporal Attention Model Training on Heterogeneous Manycore Architectures

Saiman Dahal;Pratyush Dhingra;Krishu Kumar Thapa;Partha Pratim Pande;Ananth Kalyanaraman

IEEE Transactions on Parallel and Distributed Systems
Year: 2025 | Volume: 36, Issue: 3 | Journal Article |
Transformer models have become widely popular in numerous applications, and especially for building foundation large language models (LLMs). Recently, there has been a surge in the exploration of transformer-based architectures in non-LLM applications. In particular, the self-attention mechanism within the transformer architecture offers a way to exploit any hidden relations within data, making it...Show More

HpT: Hybrid Acceleration of Spatio-Temporal Attention Model Training on Heterogeneous Manycore Architectures

Saiman Dahal;Pratyush Dhingra;Krishu Kumar Thapa;Partha Pratim Pande;Ananth Kalyanaraman

Year: 2025 | Volume: 36, Issue: 3 | Journal Article |

FARe: Fault-Aware GNN Training on ReRAM-Based PIM Accelerators

Pratyush Dhingra;Chukwufumnanya Ogbogu;Biresh Kumar Joardar;Janardhan Rao Doppa;Ananth Kalyanaraman;Partha Pratim Pande

2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Year: 2024 | Conference Paper |
Cited by: Papers (1)
Resistive random-access memory (ReRAM)-based processing-in-memory (PIM) architecture is an attractive solution for training Graph Neural Networks (GNNs) on edge platforms. However, the immature fabrication process and limited write endurance of ReRAMs make them prone to hardware faults, thereby limiting their widespread adoption for GNN training. Further, the existing fault-tolerant solutions prov...Show More

FARe: Fault-Aware GNN Training on ReRAM-Based PIM Accelerators

Pratyush Dhingra;Chukwufumnanya Ogbogu;Biresh Kumar Joardar;Janardhan Rao Doppa;Ananth Kalyanaraman;Partha Pratim Pande

Year: 2024 | Conference Paper |

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