Overview of high K gate dielectric research

The replacement of SiO/sub 2/ by an alternative dielectric is a formidable task and one must consider the task as an integrated task involving not only the gate dielectric but the equally important areas of gate dielectric-silicon interface, gate contact material and the interface between the gate contact material and the gate dielectric. Especially important is the dielectric-silicon interface as this has very essential influences on the MOS channel mobility and current drive of CMOS devices.

Research activities in alternative high K gate dielectrics for CMOS devices has greatly intensified in the past few years. This is due in large part to the 1997 ITRS document that projected the requirement of gate oxide thicknesses below 1 nm by the year 2012 and for 50 nm device gate lengths. In response to these identified needs, SRC and SEMATECH have greatly increased university research in these areas and many industries have greatly increased their research efforts. While considerable progress has been made, much work still remains in finding a replacement high K gate stack.