PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules

As a critical energy-conversion system component, power semiconductor modules and their layout optimization has been identified as a crucial step in achieving the maximum performance and density for wide bandgap technologies (i.e., GaN and SiC). New packaging technologies are also introduced to produce reliable and efficient multichip power module (MCPM) designs to push the current limits. The complexity of the MCPM layout is surpassing the capability of a manual, iterative design process to produce an optimum design with agile development requirements. An electronic design automation tool called PowerSynth has been introduced with on-going research toward enhanced capabilities to speed up the optimized MCPM layout design process. As a part of this continuing research, in PowerSynth v1.9, a constraint-aware layout engine has been developed, which enables integrating heterogeneous components, handling complex geometry, exploring a larger solution space, improved success rate, and providing options for multiobjective optimization algorithms. The layout engine is generic, scalable, and efficient in performing electro-thermal optimizations on both 2-D and 2.5-D power modules. To validate these enhanced design capabilities, a 2.5-D full-bridge power module layout is designed, optimized, fabricated, and tested with measurement results matching closely with model prediction. This result closes the loop in the power electronics design process with an experimentally validated module design automation flow.

I. Introduction

Recent advancements in electric automobiles, aircraft, smart grid, and consumer devices all require next-generation power conversion circuits and systems with extremely high density, efficiency, and reliability [1], [2]. These unprecedented demands are accelerating the design and packaging evolution of power modules by integrating wide bandgap (WBG) devices (e.g., SiC/GaN) and passive components [3], [4]. Moreover, multichip power module (MCPM) layouts need to be optimized carefully to push the power density with smaller filter size, and increased switching frequency [5]–[7]. Novel packaging and design techniques are introduced to minimize parasitics, improve cooling, increase power density, and reduce voltage overshoot [8], [9]. These techniques include integrating multiple substrates into a single package, flip-chip wirebondless modules, and packaging heterogeneous components like gate drivers, heat sinks, thermal sensors and switches, decoupling capacitors along with power devices.