I. Introduction
In nanoscale technologies, Single-Event Transients (SETs) dominate the soft-error response of advanced digital CMOS integrated circuits (ICs) [1]–[5]. As a result, it is important to know the SET pulse characteristics (specifically, SET pulse width) to estimate the vulnerability of a given circuit. Various techniques have been used to characterize these SETs, which are temporary perturbations initiated in logic gates. Some of these approaches measure pulse widths directly using on-chip circuits [6], [7] or using off-chip oscilloscopes [8], while others have tried to measure the pulse width indirectly by calculating the cross-section of events generated from such SETs [1], [2]. The type of measurement circuit used decides to a large extent the accuracy achievable.