I. Introduction
Technological advancement drives demand for increased computational capacity to run increasingly complex applications, followed by higher transistor density in a single monolithic chip. However, with deceleration in Moore’s Law and Dennard scaling, the semiconductor industry is moving towards heterogeneous integration in which individual silicon modules, known as chiplets or dielets, are integrated and connected into an interposer substrate to form a final package called system-in-package (SiP) [1]. SiP offers low power, high performance and various functionalities in smaller packages [1], [2]. Chiplets can be collected by SiP integrators from various sources. They can be fabricated either by an Integrated Device Manufacturer (IDM) or outsourced to an independent foundry by a fabless design company.