Contents I. Introduction
Analog and mixed signal (AMS) circuits, such as phased lock loops (PLLs), oscillators, analog to digital converters (ADCs), digital to analog converters (DACs), mixers, delay locked loops (DLLs), and so on, are all essential parts of integrated circuits (ICs). A significant portion of overall design errors are now being associated with AMS components primarily because these components are not portable between different technologies. Furthermore, AMS components are also the most arduous to design, especially in advanced technology nodes (32 nm and beyond), due to factors such as sensitivity to device sizes and process nodes, lack of standardization, lack of rapid emulation, long simulation times, and so on [1]. The typical AMS component design cycle requires the designer to iteratively perform design, simulation, layout, post-layout simulation, fabrication, and testing processes. The AMS circuit designer has to undergo this method a number of times, optimizing the design with each cycle, before the final product can be deployed on chips [2]. The SPICE simulation of these components is very slow, especially for circuits with a significant number of transistors and other analog components. Further research to speed up SPICE simulations is underway [3], [4], [5], however, it is still not expected to be close to replicating a real-time emulation. A MATLAB/Simulink-based simulation approach for switched capacitor-based circuits is proposed in [6] and [7]. The simulation method of [6] can be up to 10000 times faster than traditional SPICE-based transistor level simulation. Nevertheless, this technique is still not as accurate as hardware emulation. The manual layout process, which requires the designer to have RF and impedance matching expertise in case of high frequency and system on chip (SoC) products, consumes a considerable amount of design time. Furthermore, the fabrication and testing steps are also time consuming, resulting in a typical AMS circuit’s design time that is comprised of at least a year or more to account for more complex designs. On the other hand, the digital design engineer has access to field-programmable gate arrays (FPGAs) which allows the designer to emulate the circuit before ASIC design, thereby reducing the design verification time. Moreover, while the digital design tools enable automated layout and routing which also saves a significant amount of time, no such automated design tools exist for AMS circuits. As such, the AMS circuit components can only be simulated before the tape-out, and the designer must also perform time consuming hand layout for fabrication. By emulating an AMS circuit on digital hardware, the AMS designer can take advantage of the digital tools’ automated routing, as well as rapid prototyping and verification. The current emulation solutions consist of programmable analog device arrays (PANDAs) [8] and field programmable analog arrays (FPAAs) [9], [10]. The FPAAs offer components such as operational amplifiers, trans-conductance amplifiers, switched capacitor circuits, track and hold circuits, ADCs and DACs, and so on [10]. Conversely, the PANDAs offer a much more versatile design environment by giving access to transistor level programmability [8]. However, neither of these solutions are accurate enough, as they model the analog devices using primitive blocks and suffer from issues, such as low signal to noise ratio (SNR), restricted number of analog blocks, relatively inflexible construction of analog blocks, and interconnect associated parasitics, and so on [1], [11]. Furthermore, they require special devices, including reconfigurable transistors or analog macros, which are not yet commercially available [1].
