RRAM-Based Energy Efficient Scalable Integrate and Fire Neuron With Built-In Reset Circuit

In this brief, we propose a Resistive Random Access Memory (RRAM) based self-resetting Integrate and Fire ( $\text{I}\&\text{F}$ ) neuron. The proposed neuron circuit does not require any external bias voltage and the integration of control unit required to reset RRAM into neuron circuit optimizes its overall power consumption. The neuron circuit proposed in this brief consists of two RRAMs for integrate and fire operations, whereas, pulse propogation and reset circuit consists of 22 CMOS transistors. It consumes $1.5~fJ$ per spike, which is 48% and 53% less than the recent neurons designed using, nanoscale FBFET and PDSOI-MOSFET, respectively. The operating frequency of proposed neuron ranges from $277~KHz$ to $03~MHz$ , which is at least 7.5% and 10% higher than the operating frequencies of above mentioned recent neurons, respectively. The inclusion of reset circuit into RRAM based neuron circuit enables the implementation of large scale spiking neural network (SNN), which makes it superior in terms of power and energy consumption.

I. Introduction

A human brain is capable of performing compute intensive tasks, such as multi object recognition, reasoning and decision making etc., while consuming only of power [1]. A CPU recognising 1000 different objects consumes around of power [1]. As we know, in a human brain, there are around 10¹¹ neurons, which are interconnected through approximately 10¹⁵ synapses [2]. Even with the latest technological advancements, Von-Neumann architecture based processor are getting limited to further optimize speed and power. This motivated researchers to explore other paradigms, such as neuromorphic computing, in which key algorithmic and computational features of the brain are emulated in silicon based hardware [2] to improve performance at the minimal power.