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A Low Phase Noise 30 GHz Oscillator Topology for Resonant-Fin-Transistors Based High-Q On-chip Resonators in 14 nm Technology | IEEE Conference Publication | IEEE Xplore

A Low Phase Noise 30 GHz Oscillator Topology for Resonant-Fin-Transistors Based High-Q On-chip Resonators in 14 nm Technology


Abstract:

This work presents an ultra low phase noise 30 GHz oscillator topology in 14 nm technology for an active mode Micro-electro-mechanical systems (MEMS) based resonator that...Show More

Abstract:

This work presents an ultra low phase noise 30 GHz oscillator topology in 14 nm technology for an active mode Micro-electro-mechanical systems (MEMS) based resonator that utilizes resonant-fin transistors (RFT). A novel oscillator architecture has been presented for the active mode RFT, which can be modelled as a voltage controlled current source with 270° phase shift between its output current and input voltage. The proposed oscillator has been designed in 14 nm GF technology and simulation results show that it achieves phase noise less than −144 dBc/Hz at 1 MHz offset for 30 GHz carrier frequency for active mode RFT with quality factor of 10,000, while consuming 5.5 mW power from 0.8 V supply.
Date of Conference: 26 February 2022 - 02 March 2022
Date Added to IEEE Xplore: 14 September 2022
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Conference Location: Bangalore, India
Center for VLSI and Embedded Systems Technology (CVEST), IIIT Hyderabad, India
Department of Electrical and Computer Engineering, Purdue University, USA
Department of Electrical and Computer Engineering, Purdue University, USA
Department of Electrical and Computer Engineering, Purdue University, USA

I. Introduction

High quality factor (Q) on-chip resonators are highly sought for ultra low phase noise oscillators in high performance wireless transceivers. With the advent of 5G technologies, demand of low phase noise, low power, phase locked loop (PLL) free radio frequency (RF) synthesizers have risen to support the huge number of channels around mmWave frequencies. For example, at 30 GHz carrier frequency, continuous channel bandwidth of about 800 MHz to 1 GHz are possible in 5G technologies and there could exist multiple such channels. Traditionally, for RF carrier synthesis, piezoelectric quartz crystals, with reasonable frequency stability having Q > 105 are used in oscillators. However, due to its bulky size, integration of quartz crystals in standard IC technology is very difficult. Moreover, these quartz crystals are also limited to MHz frequencies (<500MHz), which makes PLL essential for >10 GHz frequency generation, which in turn increases the power consumption while significantly increasing system complexity. The other choice for mmWave oscillators is using on-chip LC tanks. However, problem with LC oscillators is that it occupy huge area. Moreover, its frequency stability is limited due to the limited Q (<30) of the on-chip LC tank. Injection locking technique or a PLL can be used to improve the performance of an LC oscillator but at the cost of increased power and area. For low power and area efficient RF carrier generation, PLL-free direct resonator based systems seem more viable, which require more versatile devices with monolithic IC integration capabilities. Moreover, transceiver arrays in multiple-input-multiple-output fashion for 5G applications also need individual RF carrier generators, where a fixed frequency carrier is required from each transceiver and tuning range of oscillator need not to be very wide.

Center for VLSI and Embedded Systems Technology (CVEST), IIIT Hyderabad, India
Department of Electrical and Computer Engineering, Purdue University, USA
Department of Electrical and Computer Engineering, Purdue University, USA
Department of Electrical and Computer Engineering, Purdue University, USA

References

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