I. Introduction
One practical solution for reducing hardware cost and power consumption in massive MIMO systems is to use low-resolution (e.g., 1–3 bits) analog-to-digital converters (ADCs), due to their simple structure and very low power consumption. In particular, the number of comparators in a -bit ADC grows exponentially with , which means both the hardware complexity and the power consumption of an ADC scales exponentially with the resolution [1]. Therefore, the cost and power consumption of low-resolution ADCs are substantially lower than for high-resolution ADCs. Furthermore, the hardware structure of other components in an RF chain can also be simplified or removed when low-resolution ADCs are used. For example, the simplest architecture involving one-bit ADCs does not require an automatic gain control (AGC) since only the sign of the real and imaginary parts of the received signals is retained. The stringent linearity requirement of the low-noise amplifier (LNA) can be relaxed and a simpler low-cost amplifier can be used instead. These benefits on the hardware side make it possible to deploy low-resolution ADCs in practical massive MIMO systems. However, the lower-complexity and lower-power-consumption hardware necessitates special care in the subsequent signal processing. More specifically, the nonlinearities introduced by the low-resolution ADCs makes signal processing tasks such as channel estimation and data detection in few-bit MIMO systems much more challenging compared to those in unquantized systems. Therefore, it is crucial that efficient signal processing methods for channel estimation and data detection be developed for such systems so that they can be transitioned to commercial systems.