In-Memory Unified TRNG and Multi-Bit PUF for Ubiquitous Hardware Security

This work describes an SRAM architecture with in-memory generation of both dynamic and multi-bit static entropy. This inexpensively extends complete key generation capabilities to any system that includes an SRAM, and hence ubiquitously down to tightly constrained and very low cost. The array embeds a true random number generator (TRNG) and a physically unclonable function (PUF), while using a commercial bitcell and periphery all-digital pitch-matched augmentation to retain the simplicity of memory compiler designs. TRNG bits are generated from bitline discharge induced by the cumulative column-level leakage, whose otherwise exponential energy increase under temperature fluctuations is counteracted by an energy control loop. Multiple PUF bits (e.g., two bits) per accessed bitcell are uniquely extracted from the bitline discharge rate, rather than conventional power-up state. A 16-kb SRAM array in 28 nm shows cryptographic-grade TRNG operation at the low area cost of 12.5 $\mu \text{m}^{2}$ per output stream, and two-bit/PUF bitcell with 12.6 Gbps and 72 fJ/bit energy. Embedment within the array and inherent data locality eliminate obvious physical attack points of standalone TRNGs and PUFs.

I. Introduction

Random keys generation is a foundational task in the chain of trust of connected systems, and in security protocols for device authentication, in-transit data confidentiality and integrity assurance, and many others [1]–[6] [see Fig. 1(a)]. Hardware-secure data handling and exchange invariably requires on-chip generation of random keys with dynamic and static entropy enabled by true random number generators (TRNGs) [7]–[15] and physically unclonable functions (PUFs) [16]–[26]. Fig. 1.

(a) Secure key generation sub-system and (b) in-memory unified entropy source (SRAM with TRNG and PUF) for secure SoCs.