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V-Band Six-Port Interferometer Receiver: High Data-Rate Wireless Applications, BER and EVM Analysis, and CFO Compensation | IEEE Journals & Magazine | IEEE Xplore

V-Band Six-Port Interferometer Receiver: High Data-Rate Wireless Applications, BER and EVM Analysis, and CFO Compensation


The block diagram of the proposed front-end receiver based on the six-port interferometer (SPI). The system is designed to cover the entire unlicensed 60-GHz spectrum, an...

Abstract:

The realization and analysis of an implemented V-band six-port demodulator, operating over 60 GHz band, are presented in this paper. The performance of the design in real...Show More

Abstract:

The realization and analysis of an implemented V-band six-port demodulator, operating over 60 GHz band, are presented in this paper. The performance of the design in real-time high-data-rate wireless data transmission is strongly proved using different modulated signals. The valid high data-rate demodulation results achieved over a 7 GHz band (from 57 to 64 GHz), provide a confirmation that this six-port interferometer receiver is an attractive proposition for homodyne or heterodyne transceivers designed for high-speed short-range wireless communication systems, such as future wireless small cell backhaul for 5G. The performance of the proposed direct conversion receiver is characterized in terms of the bit error rate (BER) and error vector magnitude (EVM) for various M-PSK/M-QAM demodulated signals. To verify the resulting data, the relation between the error vector magnitude and the bit error rate is also analyzed. Theoretical results are matched to measured values and validate that the EVM and BER are appropriate metrics for mm-wave channels limited by additive white Gaussian noise. In the last section, the proposed six-port interferometer is introduced for precise estimation of carrier frequency offset (CFO) and Doppler shift in V-band wireless systems. The final results, which include various modulation configurations at mega or Giga symbol rates generated by the implemented transmitter, are supported by laboratory measurements.
The block diagram of the proposed front-end receiver based on the six-port interferometer (SPI). The system is designed to cover the entire unlicensed 60-GHz spectrum, an...
Published in: IEEE Access ( Volume: 9)
Page(s): 160847 - 160854
Date of Publication: 03 December 2021
Electronic ISSN: 2169-3536

Funding Agency:


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SECTION I.

Introduction

The increasing interest in higher data traffic and speed in wireless systems leads to the necessity of higher bandwidth and data rate on the backhaul side of the network [1]. Millimeter-wave communications have the potential to dominate the future radio systems and telecommunications. While lower frequency cellular and wireless local area networks continue to suffer from spectrum limitations, millimeter (mm)-wave bands, with access to ultra-wideband (UWB) spectrum, are available to promote multi-Gb/s data communications [2]–​[5].

Higher data rate communications need more bandwidth. The actual global bandwidth shortage motivates the exploration of the underutilized mm-wave frequency spectrum for future broadband cellular communication networks. This growing interest has prompted regulatory agencies to open up new spectrum utilization opportunities in recent years. The FCC introduced an opening of 7 GHz spectrum in the V-band (57–64 GHz) for unlicensed short-range links [4]–​[7].

Regular mm-wave receiver systems that employ discrete nonlinear diodes or mixers for down-converting the RF signal, require a high-power LO signal of a minimum +10 dBm. An interesting structure is the use of multiports in front-end receivers. In multiports, the interferometric approach compares the incoming RF signal with the reference LO signal. Six-port interferometer receivers, which are a category of multi-ports, have capabilities of significant LO power consumption reduction (less than −10 dBm), small size, low-cost receiver front-end, and easy fabrication [8]–​[10].

The proposed mm-wave interferometry in this research project will pave the way for more efficient devices, modules, and transceivers. Due to the large frequency band, significant path losses, and required (low) bit error rates, novel antenna array designs are created for high-gain and precise beamforming [11]–​[13]. The integration on the same multi-chip module of beam-steering antenna arrays, amplifiers, down-converters, direct mm-wave quadrature modulators, and other devices reduce the size and increase the overall performances of mm-wave transceivers, at lower DC and RF power consumption, compared to today’s conventional solutions [14], [15]. In the last two decades, six-port receivers have been investigated in the literature. A six-port interferometer is a passive microwave system composed of couplers and/or power dividers, joined by transmission lines. It has two inputs and four outputs and operates as a dual-channel receiver when four power detectors are attached to outputs [8], [16]–​[20].

This manuscript presents the design of a low power consumption six-port front-end receiver to demonstrate the performance of multiport technology for advanced high data-rate wireless systems. For the purpose of this project, a V-band six-port interferometer circuit, a baseband amplifier board, and a frequency multiplier are designed, manufactured and tested. The system is designed to cover the entire unlicensed 60-GHz spectrum, from 57 GHz to 64 GHz, and support short-range communications. We have measured EVM, and BER for high symbol rates and compared them to the estimated metrics for modulation formats of phase-shift keying (i.e., BPSK, quadrature PSK (QPSK), 8PSK, 16QAM, and 32QAM). Demodulation results of M-PSK and M-QAM signals are analyzed and examined utilizing the proposed six-port front-end based on a novel developed MHMIC fabrication technology process. The performance of the six-port demodulator is illustrated in terms of the Bit Error Rate (BER) and Error Vector Magnitude (EVM), and for different frequencies and modulations over a 7 GHz band. The impact of carrier frequency offset (CFO) on these signals, and accurate measurement of this phenomenon by employing the proposed setup are investigated as well.

SECTION II.

V-Band Six-Port Interferometer

The block diagram of the direct down-conversion front-end based on the six-port interferometer (SPI) is represented in Fig. 1. The front-end section includes a receiver antenna, an LNA, a six-port interferometer, and related power detectors. The power detectors produce quadrature differential signals, based on the frequency, phase and amplitude differences between the RF input unknown signal (a6) and the reference signal (a5) given by the LO [21].

FIGURE 1. - The block diagram of the designed front-end based on the six-port interferometer (SPI).
FIGURE 1.

The block diagram of the designed front-end based on the six-port interferometer (SPI).

Broadband high-frequency resistors and terminations are required in designing the high data-rate six-port demodulator. The ideal load termination is a reflection-less transition from the transmission line impedance to Via-less ground, and it is usually being realized as a resistor with the same impedance as the transmission line. The most popular terminations employed in subsystems are microstrip or CPW topologies. High-frequency microstrip terminations are simple to make. The best performance is achieved using thin ceramic substrates. The resistive layer is 20 nm of Titanium under gold (conductor), and the amount of resistance is 100~\Omega /Squar. For fabrication purposes, the conductor is etched with Titanium, in the next step, the resistor is open through the conductor (see Figure 2). High-precision 50~\Omega loads and the 100 \Omega resistor for Wilkinson power divider are implemented on 100 \Omega per square titanium oxide thin layer (20 nm) to enable an accurate impedance matching. This type of termination is ideal for high frequency, has high return loss, and does not require a via-hole ground.

FIGURE 2. - The candidate topology for high-frequency broadband resistors.
FIGURE 2.

The candidate topology for high-frequency broadband resistors.

Figure 3 shows a fabricated V-band front-end module based on a six-port circuit. The six-port circuit is implemented by the use of Miniaturized Hybrid Microwave Integrated Circuit (MHMIC) technology which is a new method for assembling miniaturized microwave circuits. A thin ceramic substrate (relative permittivity 9.9, thickness 5 mils) is selected for this circuit for its excellent thermal shock resistance and electrical insulation, low loss tangent ( < 5\times 10^{-4} ) and mature manufacturing technology. The size of the whole substrate is around 2.5 cm \times1.5 cm.

FIGURE 3. - The fabricated V-band front-end module, including SPI and power detectors.
FIGURE 3.

The fabricated V-band front-end module, including SPI and power detectors.

The printed circuit boards are mounted on a mechanical chassis to enable a proper assembly of SMA connectors and provide good ground contact. A broadband rectangular waveguide to microstrip line transition (WR12-to-MSL) is also implemented on the same thin-film ceramic substrate for RF and LO signals feeding.

The RF and LO input ports are connected to microstrip transitions through two standard waveguides (WR12), and all four detector outputs are wire-bonded to SMA connectors. The RF signal enters at port 6, after being received by a V-band horn antenna. The reference signal from the Local Oscillator (LO) comes to port 5 through a microstrip to WR12 Rectangular Waveguide (RW) transition. The four six-port outputs are connected to the power detectors to recover the low IF or the baseband signals. The HSCH–9161 mm-wave zero bias GaAs Schottky diode of Agilent Technologies is chosen for power detection, due to its broadband and high-speed properties [22], [23].

According to Fig. 1, if two input signals for reference and RF are, respectively:\begin{align*} a_{5}=&a\;e^{j(\omega _{0} t\;+\;\varphi _{5})} \tag{1}\\ a_{6} \left ({t }\right)=&\alpha \left ({t }\right)\;a\;e^{j(\omega t\;+\;\varphi _{6} (t))}\tag{2}\end{align*} View SourceRight-click on figure for MathML and additional features. The quadrature I and Q output IF signals are expressed as:\begin{align*} v_{IF}^{I} (t)=&v_{3} (t)-v_{1} (t) \\=&\alpha (t)\;K\;a^{2}\;\cos [(\omega -\omega _{0})t\;+\;(\varphi _{6} (t)-\varphi _{5})] \tag{3}\\ v_{IF}^{Q} (t)=&v_{4} (t)-v_{2} (t) \\=&\alpha (t)\;K\;a^{2}\;\sin [(\omega -\omega _{0})t\;+\;(\varphi _{6} (t)-\varphi _{5})]\tag{4}\end{align*} View SourceRight-click on figure for MathML and additional features.

The constant value K is related to the efficiency of power detectors, assumed to be one as the maximum. According to the previous equations, we can observe the vector relation (amplitude, frequency and phase) between the two input signals. The circuit operates as a low IF heterodyne quadrature down-converter (\omega ~\ne \omega _{0} ), or direct demodulator (\omega = \omega _{0} ). The fabricated SPI board implemented on its aluminum base is shown in Fig. 3.

SECTION III.

Baseband Amplifier PCB Design

The used mm-wave power detectors (HSCH–9161 Schottky diodes) are designed as high output impedance (in the order of \text{M}\Omega ) to keep the signal amplitude. In contrast, the standard impedance of output cables and measurement instruments is 50 \Omega . Also, due to the lossy property of the passive six-port front-end, the voltage amplitude of the baseband signal is low, and amplifying output voltage signals is a necessity for more reliable detection and BER measurements. As a result, a baseband operational amplifier circuit has been designed.

The diagram of this circuit, using current feedback operational amplifiers type AD8000 from Analog Devices Inc., is shown in Fig. 4. This ultra-high-speed amplifier has a maximum cut-off frequency of 1.5 GHz, which is adjusted by its gain. Two cascade stages are considered to achieve adequate gain, as well as the necessary bandwidth. The dc output voltages are amplified by about 9 V/V0 (19 dB) in each stage. Moreover, the non-inverting input impedance of this Op-Amp is 2 \text{M}\Omega that is matched to power detectors, and the output impedance of this circuit is fixed to 50 \Omega for connecting to related instruments. This baseband amplifier circuit design is a great candidate for solving the voltage amplitude and impedance conversion issues. The schematic layout and photo of the fabricated circuit are shown in Fig. 5 and the used resistors’ values are indicated in table 1.

TABLE 1 The Designed Values of Resistors for Baseband Circuit
Table 1- 
The Designed Values of Resistors for Baseband Circuit
FIGURE 4. - Block diagram of the baseband circuit using AD8000 op-amps.
FIGURE 4.

Block diagram of the baseband circuit using AD8000 op-amps.

FIGURE 5. - (a) The designed layout and, (b) a photo of the fabricated baseband circuit using two cascade op-amp stages.
FIGURE 5.

(a) The designed layout and, (b) a photo of the fabricated baseband circuit using two cascade op-amp stages.

FIGURE 6. - Block diagram of the designed frequency multiplier module.
FIGURE 6.

Block diagram of the designed frequency multiplier module.

SECTION IV.

V-Band Frequency Multiplier Design

For a direct down-conversion procedure, a reference signal with the same frequency as the received RF signal (V-band) is required. By a reduced LO power due to its unique characteristics, the SPI represents the vector correlation between the received mm-wave RF signal and the LO (reference) signal. Because generating high power levels is more difficult and expensive in mm-wave devices, the decreased LO power is a significant improvement. To generate this high-frequency signal by a conventional RF generator or synthesizer, designing a frequency multiplier module is a must. The block diagram of the designed frequency multiplier is displayed in Fig. 5. Two stages of GaAs MMIC \times 2 frequency multipliers from Analog Devices Inc. are considered, to have a 56–66 GHz output signal as the LO (reference) for the SPI receiver. The input frequency signal is in the range of 14 and 16 GHz. The first multiplier (HMC578-SX) is an active MMIC with sufficient output power for driving, whereas the second (HMC1105-SX) is a passive component. Two fifth-order coupled-line bandpass filters are designed next to each step of the multiplier to reject unwanted frequency harmonics and reduce noise.

Fig. 7(a) is a photo of the V-band \times 4 frequency multiplier module that is manufactured on a ceramic substrate (relative permittivity 9.9, thickness 10 mil). The size of the entire module is 4 \times 4 cm 2. The input signal inserts through an SMA connector, and the output signal exits through a microstrip to WR12 Rectangular Waveguide (RW) transition with the minimum insertion loss [24]. The simulation and measurement results for the output signal are shown in Fig. 7(b). The average output power is about +2 dBm, which is sufficient LO power for the SPI receiver. In order to modify the power level of the LO signal for the various measurement models, a manual mm-wave attenuator is considered between the multiplier and SPI modules for the experiment setup.

FIGURE 7. - (a) The implemented 
$\times 4$
 frequency multiplier module; and (b) Output power level at the 60-GHz band for the designed module.
FIGURE 7.

(a) The implemented \times 4 frequency multiplier module; and (b) Output power level at the 60-GHz band for the designed module.

SECTION V.

Demodulation Results and Discussion

The block diagram of the proposed system setup, including the MHMIC SPI and baseband amplifiers for receiving high-data-rate demodulation signals, is depicted in Fig. 8. The entire part of the block diagram is simulated in the ADS software using the measured and calculated S-parameters values. At the transmitter section, the modulated signal is generated and up-converted from IF to V-band using a sub-harmonic IQ mixer (HMC-MDB218) from Analog Devices Inc., and transmitted by a high gain mm-wave horn antenna.

FIGURE 8. - The block diagram of the proposed system setup including SPI for measurement of high data rate demodulation signals.
FIGURE 8.

The block diagram of the proposed system setup including SPI for measurement of high data rate demodulation signals.

After reception by the receiver’s horn antenna, the modulated RF signal is amplified by an LNA module (SBL-5539532560-1212) and enters the six-port through port 6. The continuous wave (CW) reference signal with the same frequency as the RF signal, is generated by a vector signal generator and the frequency multiplier module, and enters the SPI through the other input port (port 5). A mm-wave attenuator and a phase shifter are installed in the LO path to modify the power level and phase of the LO signal, respectively. One of the significant advantages of the six-port down-conversion technique is to be operative with a lower power level for the reference signal (around −10 dBm) compared to conventional passive mixers. After power detection, four baseband amplifier circuits, as illustrated in Fig. 5, are installed in the output stages. Transmitter selectively generates six complex modulation formats B/Q/8PSK and 4/16/32QAM at symbol rates up to 500 MS/s. At the receiver, data and images of demodulation results are captured by the use of a digital oscilloscope on a color-grade plot, in XY format. The results of the direct demodulation of two sample PSK/QAM signals are illustrated in Figure 9. Also, a photo of the experimental V-band wireless link setup is shown in Fig. 10.

FIGURE 9. - Measured I-Q constellation of demodulated high-rate data for selected modulation (a) 8PSK; (b) 16QAM.
FIGURE 9.

Measured I-Q constellation of demodulated high-rate data for selected modulation (a) 8PSK; (b) 16QAM.

FIGURE 10. - The V-band wireless link experimental setup for measuring demodulation results.
FIGURE 10.

The V-band wireless link experimental setup for measuring demodulation results.

SECTION VI.

Bit Error Rate (BER) Measurement

Measuring the bit error rate (BER) is among the most effective method to characterize the quality of a digital communication network. The number of received bits in error divided by the total number of transmitted sequences of bits yields the BER [25]. To test the quality of the signal transmission through the transceiver, MP1632C digital data analyzer, a 3.2 Gb/s Anritsu bit error rate tester (BERT) is used in the measurements. An experimental setup with MP1632C is assembled to measure the BER parameter of the proposed SPI. This electrical test equipment sends a pre-programmed test pattern to the transmitter and counts the errors within the proposed SPI network in the receiver. The TX and RX parts of BERT have a common clock signal to synchronize the pattern generator and the error detector. The block diagram of the test bench is shown in Fig. 11, and the measured BER versus frequency is plotted in Fig. 12. Results verify that the designed SPI front-end is operational in more than 8 GHz bandwidth from 57 GHz to 65 GHz with an acceptable BER (less than 10−6).

FIGURE 11. - The block diagram of applied test setup for measuring BER parameter.
FIGURE 11.

The block diagram of applied test setup for measuring BER parameter.

FIGURE 12. - The operational bandwidth of the SPI network defined by measured BER.
FIGURE 12.

The operational bandwidth of the SPI network defined by measured BER.

SECTION VII.

Error Vector Magnitude (EVM) Analysis

In the presence of impairments, the error vector magnitude (EVM) is a measure of demodulator performances. First, the ideal symbol locations are compared to the measured symbol positions obtained after decimating the acquired waveform at the demodulator output. The EVM of the demodulated symbols is estimated using the root-mean-square (RMS) EVM and phase error. For normalized symbols, EVM is described as the RMS value of the difference between a set of measured symbols and reference symbols.

As shown in Figure 13, EVM can be expressed mathematically as [26]:\begin{equation*} EVM_{RMS} =\sqrt {\frac {\frac {1}{N}\sum \limits _{n=1}^{N} {\left |{ {A_{err,n}} }\right |^{2}}}{\frac {1}{N}\sum \limits _{n=1}^{N} {\left |{ {A_{ref,n}} }\right |^{2}}}}\tag{5}\end{equation*} View SourceRight-click on figure for MathML and additional features. where A_{err,n} is the difference between the obtained demodulated symbol and the reference constellation point for the n^{\mathrm {th}} symbol, A_{ref,n} is the reference normalized constellation point for the n^{\mathrm {th}} symbol, and N is the number of unique symbols in the constellation. In other words, the output demodulated constellation is compared point by point to the ideal constellation of the considered modulation scheme at the input of the modulator. The EVM analysis of the proposed SPI is examined for several demodulation types at the operating frequency of 63 GHz. The simulation and measurement results are shown in Table 2.

TABLE 2 The EVM Values of Some Demodulation Signals for the SPI
Table 2- 
The EVM Values of Some Demodulation Signals for the SPI
FIGURE 13. - Constellation diagram and error vectors for a QPSK signal.
FIGURE 13.

Constellation diagram and error vectors for a QPSK signal.

The results show that the EVM values are great at the 60-GHz spectrum for more than 7 GHz bandwidth. The EVM values do not exceed 13% for all modulations. Note the simulation performance is related to the S-parameters of the fabricated six-port circuit.

SECTION VIII.

Relationship Between EVM and BER

Given that the available BERT in the laboratory generates only BPSK and QPSK modulations and measure the receiver’s BER, there is a need to estimate the BER based on the EVM for other modulation formats under test (8PSK, 16PSK, and QAMs). Later on, this relationship is used to validate the measurement data. Having L defined as the number of signal levels within each dimension of the (quadratic) constellation, and Log_{2}M as the number of bits encoded into each PSK/QAM symbol, the BER is approximated by [27]:\begin{equation*} BER\approx \frac {\left({1-\frac {1}{L}}\right)}{\log _{2} L}erfc\left [{ {\sqrt {\frac {3\log _{2} L}{(L^{2}-1)}\times \frac {\sqrt {2}}{EVM_{rms}^{2} \log _{2} M}}} }\right]\tag{6}\end{equation*} View SourceRight-click on figure for MathML and additional features. Figure 14 shows the BER as a function of the EVM of different modulated signals, for both simulation and measurement. The fact that EVM can be directly measured from the demodulated signals by the use of vector signal analyzers, saves some calculations to find the BER, and the measured values replace the end-to-end estimation. The results show that EVM is a quality measure for telecommunications systems with advanced modulation formats, and it reliably estimates BER.

FIGURE 14. - Stylized BER versus EVM Performance Curves for the proposed SPI receiver.
FIGURE 14.

Stylized BER versus EVM Performance Curves for the proposed SPI receiver.

SECTION IX.

Carrier Frequency Offset Measurement

For a target that has a relative velocity to the wave source, a shift happens to the frequency or wavelength of the wave. This phenomenon is known as the Doppler shift. In the presence of such a mismatch in the carrier frequencies at the transmitter and receiver units, the carrier frequency offset (CFO) appears. Taking care of CFO is vital in 5G portable communications operating at mm-wave frequencies, where the carrier frequency notably varies with the velocity of targets, even in the case of walking or slowly moving devices [28].

To explore the effect of CFO in numerical modulations for the proposed SPI, a QPSK IF signal with a low data rate (100 kS/s) is generated and then shifted by 20 kHz in the transmitter part as shown in figure 8. At the SPI, the phase of the points in the constellation continuously varies over time as the effect of the CFO, so the demodulated symbol constellation rotates on a circle, as observed in simulations and the oscilloscope presented in Fig. 15(a).

FIGURE 15. - A QPSK constellation signal (a) with CFO effect; (b) after the compensation for CFO.
FIGURE 15.

A QPSK constellation signal (a) with CFO effect; (b) after the compensation for CFO.

Using specific algorithms, a compensation control signal for the Phase-Locked Loop (PLL) oscillator can be generated [29]. In a hardware approach, the frequency difference between RF and LO signals leads to different voltage levels for the signals at four baseband outputs of SPI. This frequency is transformed into a voltage magnitude, and then in a software approach, a control voltage signal is employed to a VCO in order to compensate for its frequency offset [30].

Fig. 15 (a) and (b) shows the simulated and measured QPSK signal constellations in the presence of the CFO, and after the compensation for the CFO, respectively.

SECTION X.

Conclusion

The design and performance analysis of a low power consumption six-port front-end receiver in the unlicensed 60-GHz frequency band has been presented in this manuscript. It is validated that the proposed multi-port design is an attractive front-end for high date rate, low-cost and compact wireless communications at mm-wave frequency bands.

The article explains in detail the implementation of this homodyne receiver based on the six-port concept, using a developed MHMIC fabrication technology process. By deploying this technique, a miniaturized, compact, and easy-to-manufacture product is realized which is a practical candidate for portable and low-power-consumption applications. The performance of the presented front-end receiver has been examined for different high data rate demodulated signals in terms of BER and EVM parameters.

The obtained results demonstrate the potential of the 60 GHz multi-port front-end receiver to directly demodulate PSK or QAM millimeter-wave signals to baseband, and make a great contribution to the development of future compact, low-power consumption, and low-cost 60 GHz wireless systems.

References

References is not available for this document.